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Date:      Tue, 25 Dec 2018 07:01:25 +0000 (UTC)
From:      Andrew Rybchenko <arybchik@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org
Subject:   svn commit: r342425 - stable/11/sys/dev/sfxge/common
Message-ID:  <201812250701.wBP71P8M030786@repo.freebsd.org>

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Author: arybchik
Date: Tue Dec 25 07:01:25 2018
New Revision: 342425
URL: https://svnweb.freebsd.org/changeset/base/342425

Log:
  MFC r340883
  
  sfxge(4): fix diagnostics support build without Siena
  
  The compilation failed because __efx_sram_pattern_fns was used in
  efx_nic.c, but defined in efx_sram.c which is only needed when
  supporting Siena.
  
  To fix it move all the code using __efx_sram_pattern_fns into
  Siena-specific files (except for the definition in efx_sram.c itself,
  as that file only needs to be included in Siena-supporting builds
  anyway).
  
  The functions to test registers and tables are unlikely to apply to any
  new hardware and so can be moved into Siena files. Since Huntington
  such tests have been implemented in firmware.
  
  Submitted by:   Mark Spender <mspender at solarflare.com>
  Sponsored by:   Solarflare Communications, Inc.
  Differential Revision:  https://reviews.freebsd.org/D18117

Modified:
  stable/11/sys/dev/sfxge/common/efx_impl.h
  stable/11/sys/dev/sfxge/common/efx_nic.c
  stable/11/sys/dev/sfxge/common/siena_impl.h
  stable/11/sys/dev/sfxge/common/siena_nic.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/dev/sfxge/common/efx_impl.h
==============================================================================
--- stable/11/sys/dev/sfxge/common/efx_impl.h	Tue Dec 25 07:00:37 2018	(r342424)
+++ stable/11/sys/dev/sfxge/common/efx_impl.h	Tue Dec 25 07:01:25 2018	(r342425)
@@ -1119,32 +1119,6 @@ efx_vpd_hunk_set(
 
 #endif	/* EFSYS_OPT_VPD */
 
-#if EFSYS_OPT_DIAG
-
-extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
-
-typedef struct efx_register_set_s {
-	unsigned int		address;
-	unsigned int		step;
-	unsigned int		rows;
-	efx_oword_t		mask;
-} efx_register_set_t;
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count);
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count);
-
-#endif	/* EFSYS_OPT_DIAG */
-
 #if EFSYS_OPT_MCDI
 
 extern	__checkReturn		efx_rc_t

Modified: stable/11/sys/dev/sfxge/common/efx_nic.c
==============================================================================
--- stable/11/sys/dev/sfxge/common/efx_nic.c	Tue Dec 25 07:00:37 2018	(r342424)
+++ stable/11/sys/dev/sfxge/common/efx_nic.c	Tue Dec 25 07:01:25 2018	(r342425)
@@ -641,139 +641,6 @@ fail1:
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count)
-{
-	unsigned int bit;
-	efx_oword_t original;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	while (count > 0) {
-		/* This function is only suitable for registers */
-		EFSYS_ASSERT(rsp->rows == 1);
-
-		/* bit sweep on and off */
-		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-		for (bit = 0; bit < 128; bit++) {
-			/* Is this bit in the mask? */
-			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
-				continue;
-
-			/* Test this bit can be set in isolation */
-			reg = original;
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFX_SET_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			/* Test this bit can be cleared in isolation */
-			EFX_OR_OWORD(reg, rsp->mask);
-			EFX_CLEAR_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail2;
-			}
-		}
-
-		/* Restore the old value */
-		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-
-		--count;
-		++rsp;
-	}
-
-	return (0);
-
-fail2:
-	EFSYS_PROBE(fail2);
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	/* Restore the old value */
-	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
-
-	return (rc);
-}
-
-	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count)
-{
-	efx_sram_pattern_fn_t func;
-	unsigned int index;
-	unsigned int address;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
-	func = __efx_sram_pattern_fns[pattern];
-
-	while (count > 0) {
-		/* Write */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
-
-			address += rsp->step;
-		}
-
-		/* Read */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			address += rsp->step;
-		}
-
-		++rsp;
-		--count;
-	}
-
-	return (0);
-
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-
 #endif	/* EFSYS_OPT_DIAG */
 
 #if EFSYS_OPT_LOOPBACK

Modified: stable/11/sys/dev/sfxge/common/siena_impl.h
==============================================================================
--- stable/11/sys/dev/sfxge/common/siena_impl.h	Tue Dec 25 07:00:37 2018	(r342424)
+++ stable/11/sys/dev/sfxge/common/siena_impl.h	Tue Dec 25 07:01:25 2018	(r342425)
@@ -58,6 +58,15 @@ siena_nic_init(
 
 #if EFSYS_OPT_DIAG
 
+extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
+
+typedef struct siena_register_set_s {
+	unsigned int		address;
+	unsigned int		step;
+	unsigned int		rows;
+	efx_oword_t		mask;
+} siena_register_set_t;
+
 extern	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp);

Modified: stable/11/sys/dev/sfxge/common/siena_nic.c
==============================================================================
--- stable/11/sys/dev/sfxge/common/siena_nic.c	Tue Dec 25 07:00:37 2018	(r342424)
+++ stable/11/sys/dev/sfxge/common/siena_nic.c	Tue Dec 25 07:01:25 2018	(r342425)
@@ -455,7 +455,7 @@ siena_nic_unprobe(
 
 #if EFSYS_OPT_DIAG
 
-static efx_register_set_t __siena_registers[] = {
+static siena_register_set_t __siena_registers[] = {
 	{ FR_AZ_ADR_REGION_REG_OFST, 0, 1 },
 	{ FR_CZ_USR_EV_CFG_OFST, 0, 1 },
 	{ FR_AZ_RX_CFG_REG_OFST, 0, 1 },
@@ -487,7 +487,7 @@ static const uint32_t __siena_register_masks[] = {
 	0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000
 };
 
-static efx_register_set_t __siena_tables[] = {
+static siena_register_set_t __siena_tables[] = {
 	{ FR_AZ_RX_FILTER_TBL0_OFST, FR_AZ_RX_FILTER_TBL0_STEP,
 	    FR_AZ_RX_FILTER_TBL0_ROWS },
 	{ FR_CZ_RX_MAC_FILTER_TBL0_OFST, FR_CZ_RX_MAC_FILTER_TBL0_STEP,
@@ -514,10 +514,144 @@ static const uint32_t __siena_table_masks[] = {
 };
 
 	__checkReturn	efx_rc_t
+siena_nic_test_registers(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		size_t count)
+{
+	unsigned int bit;
+	efx_oword_t original;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	while (count > 0) {
+		/* This function is only suitable for registers */
+		EFSYS_ASSERT(rsp->rows == 1);
+
+		/* bit sweep on and off */
+		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+		for (bit = 0; bit < 128; bit++) {
+			/* Is this bit in the mask? */
+			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
+				continue;
+
+			/* Test this bit can be set in isolation */
+			reg = original;
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFX_SET_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			/* Test this bit can be cleared in isolation */
+			EFX_OR_OWORD(reg, rsp->mask);
+			EFX_CLEAR_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail2;
+			}
+		}
+
+		/* Restore the old value */
+		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+
+		--count;
+		++rsp;
+	}
+
+	return (0);
+
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	/* Restore the old value */
+	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
+
+	return (rc);
+}
+
+	__checkReturn	efx_rc_t
+siena_nic_test_tables(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		efx_pattern_type_t pattern,
+	__in		size_t count)
+{
+	efx_sram_pattern_fn_t func;
+	unsigned int index;
+	unsigned int address;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
+	func = __efx_sram_pattern_fns[pattern];
+
+	while (count > 0) {
+		/* Write */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
+
+			address += rsp->step;
+		}
+
+		/* Read */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			address += rsp->step;
+		}
+
+		++rsp;
+		--count;
+	}
+
+	return (0);
+
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
+}
+
+
+	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp)
 {
-	efx_register_set_t *rsp;
+	siena_register_set_t *rsp;
 	const uint32_t *dwordp;
 	unsigned int nitems;
 	unsigned int count;
@@ -551,21 +685,21 @@ siena_nic_register_test(
 		rsp->mask.eo_u32[3] = *dwordp++;
 	}
 
-	if ((rc = efx_nic_test_registers(enp, __siena_registers,
+	if ((rc = siena_nic_test_registers(enp, __siena_registers,
 	    EFX_ARRAY_SIZE(__siena_registers))) != 0)
 		goto fail1;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_ALTERNATE,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail2;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_CHANGING,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail3;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BIT_SWEEP, EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail4;
 



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