Date: Tue, 22 Sep 2015 13:25:22 -0600 From: Warner Losh <imp@bsdimp.com> To: Dimitry Andric <dim@FreeBSD.org> Cc: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: Re: svn commit: r288121 - projects/clang370-import/contrib/libc++/src/support Message-ID: <FA4A9032-C7B3-45C6-AF5C-8C0CA98C90A5@bsdimp.com> In-Reply-To: <9B0C3FE9-821B-470E-8AFC-F5B3DCE5B8F4@FreeBSD.org> References: <201509221734.t8MHYp0W052286@repo.freebsd.org> <00F42FF7-84D4-4C97-974F-C28DB36D4392@bsdimp.com> <9B0C3FE9-821B-470E-8AFC-F5B3DCE5B8F4@FreeBSD.org>
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[-- Attachment #1 --] > On Sep 22, 2015, at 12:48 PM, Dimitry Andric <dim@FreeBSD.org> wrote: > > On 22 Sep 2015, at 20:37, Warner Losh <imp@bsdimp.com> wrote: >> >>> On Sep 22, 2015, at 11:34 AM, Dimitry Andric <dim@freebsd.org> wrote: >>> NOTE: this needs to be fixed properly later on, by supplying library >>> functions implementing atomic operations for arm < v6. We should >>> probably take those from sys/arm/arm/stdatomic.c, and stuff them into >>> either libgcc or compiler-rt. >> >> I don’t think you can do that. >> >> arm < v6 is special. The CPUs don’t have atomic operations. In the kernel, >> we disable interrupts and do the op. You can’t do that in user land. Instead, >> you have to use RAS (Restartable Atomic Sequences) and have the kernel >> grok the RAS. Thankfully, the RAS support in the kernel is just the R in that. >> But it does mean that we’ll have some work to do this properly. >> >> I’m not entirely sure that your ‘fix’ makes things actually safe, even if it >> seems to make them work today. I’ll have to study it more closely. > > Probably not 100% safe, since the stub functions are just placeholders > which aren't atomic at all. Then again, if we insist on this being > correct, we will have no choice as to disable the atomic support in > libc++ somehow. (I'm not sure if this is supported by upstream at all.) > > As far as I understood on IRC, the functions in stdatomic.c should work > in userland, unless you are using real SMP? (And does that even exist > for such old ARM architectures?) I think you misunderstand. We can switch threads at any point on armv4 based on an interrupt coming in. For load and store, this won’t matter. But for everything else, it won’t work. You don’t need SMP to trigger a race in user land atomics. We already have most of the bits in arm/include/atomic.h, but they are for FreeBSD atomic interface not the others. I haven’t pulled the 3.7 tree to see what’s up there since these files don’t seem to be present in head. Warner [-- Attachment #2 --] -----BEGIN PGP SIGNATURE----- Comment: GPGTools - https://gpgtools.org iQIcBAEBCgAGBQJWAasjAAoJEGwc0Sh9sBEA01IQAO1J0n8xWI33uD4xKkRIKtq1 lsYuIuDEHiQoT7vIi8LXluLa3YhzA5woOBADVOPkVHFvhXEeURfU2t0Jo8lYD0Ny PsEM4BLHVvDWpFzAwuUfdatncSxauhID61Agj68GFCrsrIUQ0v23PKMQ0zIw9Rc1 dQ3+1qMgTosnfFl4dZlxGPte8toq/Z1UtYZFQKtHZ0xteVpMiYusTUsxJpAW3FFX Ckeyc2tvqHuKZfKGJcA/8+LRdULpoFJLHSbLDPp2Kn5p/LTqPZNWbWnGnLAaxIdc Tta7iqjGx3faqk7X0ZhSY1bqai9dO+ixQWavzHThDmrzOaGy7YGbwEFGANMOOrw6 u2k9I2ijQmRPFO2rHogjwHtOpn4vgBSH4aLtYoguW0ZF3au2SOyfkVydMTMfOloD Y+5T473vFgHnuAzpjgw1YrUh5kiMdHPdou4SqEVW3dd8beqREph3ZUJmDtpBdiY4 DpjTiFsRQLeM9/neCCONWguz4HLQuHZlcVa/gNsc4Ig0Erie4zIIeyMmweWu8KL3 wqaFXiR2CyvY7cSnz72LoEpQfIu3assudZpqWuOyeu0dEH/oyDNOYqnJgvn6wGfb SK8zfmDDe2rTW+TVEsH44Dxy501Le57K+FXX7Lwyb3EOAgQcLuFeevRWbUG/ynmc j2wL0xMNN2H3V3a1dCVL =9LFN -----END PGP SIGNATURE-----
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