Date: Wed, 7 Aug 2024 17:06:30 GMT From: Yuri Victorovich <yuri@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: a6386b215288 - main - cad/yosys: update 0.43 =?utf-8?Q?=E2=86=92?= 0.44 Message-ID: <202408071706.477H6UqM077735@gitrepo.freebsd.org>
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The branch main has been updated by yuri: URL: https://cgit.FreeBSD.org/ports/commit/?id=a6386b215288f12dc66931550e597ec12ab3e4b1 commit a6386b215288f12dc66931550e597ec12ab3e4b1 Author: Yuri Victorovich <yuri@FreeBSD.org> AuthorDate: 2024-08-07 16:57:21 +0000 Commit: Yuri Victorovich <yuri@FreeBSD.org> CommitDate: 2024-08-07 17:06:21 +0000 cad/yosys: update 0.43 → 0.44 Reported by: portscout --- cad/yosys/Makefile | 2 +- cad/yosys/distinfo | 6 +++--- cad/yosys/pkg-plist | 10 ++++++++++ 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/cad/yosys/Makefile b/cad/yosys/Makefile index b11f96f2fd00..7ab9ab1de9fd 100644 --- a/cad/yosys/Makefile +++ b/cad/yosys/Makefile @@ -1,6 +1,6 @@ PORTNAME= yosys DISTVERSIONPREFIX= yosys- -DISTVERSION= 0.43 +DISTVERSION= 0.44 CATEGORIES= cad MAINTAINER= yuri@FreeBSD.org diff --git a/cad/yosys/distinfo b/cad/yosys/distinfo index 84e217424fdd..d1c2d5cc68fb 100644 --- a/cad/yosys/distinfo +++ b/cad/yosys/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1720600290 -SHA256 (YosysHQ-yosys-yosys-0.43_GH0.tar.gz) = e341d7c3712f58787554c28c12c9f4cb5e102f9ff154f5a5e49238c1adfb309f -SIZE (YosysHQ-yosys-yosys-0.43_GH0.tar.gz) = 2808745 +TIMESTAMP = 1723002938 +SHA256 (YosysHQ-yosys-yosys-0.44_GH0.tar.gz) = 3394b1fdb1c67c362513518d6049ef7db72ba45cca629af22bd52bf46b405ed2 +SIZE (YosysHQ-yosys-yosys-0.44_GH0.tar.gz) = 2840442 diff --git a/cad/yosys/pkg-plist b/cad/yosys/pkg-plist index 3215483cdf07..3e81e0474fec 100644 --- a/cad/yosys/pkg-plist +++ b/cad/yosys/pkg-plist @@ -109,6 +109,7 @@ bin/yosys-witness %%DATADIR%%/include/frontends/ast/ast_binding.h %%DATADIR%%/include/frontends/blif/blifparse.h %%DATADIR%%/include/kernel/binding.h +%%DATADIR%%/include/kernel/bitpattern.h %%DATADIR%%/include/kernel/cellaigs.h %%DATADIR%%/include/kernel/celledges.h %%DATADIR%%/include/kernel/celltypes.h @@ -197,6 +198,15 @@ bin/yosys-witness %%DATADIR%%/lattice/latches_map.v %%DATADIR%%/lattice/lutrams.txt %%DATADIR%%/lattice/lutrams_map.v +%%DATADIR%%/microchip/LSRAM.txt +%%DATADIR%%/microchip/LSRAM_map.v +%%DATADIR%%/microchip/arith_map.v +%%DATADIR%%/microchip/brams_defs.vh +%%DATADIR%%/microchip/cells_map.v +%%DATADIR%%/microchip/cells_sim.v +%%DATADIR%%/microchip/polarfire_dsp_map.v +%%DATADIR%%/microchip/uSRAM.txt +%%DATADIR%%/microchip/uSRAM_map.v %%DATADIR%%/mul2dsp.v %%DATADIR%%/nexus/arith_map.v %%DATADIR%%/nexus/brams.txt
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