Date: Mon, 3 Oct 2011 21:19:16 +0000 (UTC) From: Alexander Motin <mav@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r225953 - head/sys/powerpc/powerpc Message-ID: <201110032119.p93LJG7W028236@svn.freebsd.org>
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Author: mav Date: Mon Oct 3 21:19:15 2011 New Revision: 225953 URL: http://svn.freebsd.org/changeset/base/225953 Log: Revert r225875, r225877: It is reported that on some chips (e.g. the 970MP) behavior of POW bit set simultaneously with modifying other bits is undefined and may cause hangs. The race should be handled in some other way, but for now just get back. Reported by: nwitehorn Modified: head/sys/powerpc/powerpc/cpu.c Modified: head/sys/powerpc/powerpc/cpu.c ============================================================================== --- head/sys/powerpc/powerpc/cpu.c Mon Oct 3 20:49:02 2011 (r225952) +++ head/sys/powerpc/powerpc/cpu.c Mon Oct 3 21:19:15 2011 (r225953) @@ -65,7 +65,6 @@ #include <sys/cpu.h> #include <sys/kernel.h> #include <sys/proc.h> -#include <sys/sched.h> #include <sys/sysctl.h> #include <machine/bus.h> @@ -554,11 +553,6 @@ cpu_idle_60x(void) vers = mfpvr() >> 16; #ifdef AIM - mtmsr(msr & ~PSL_EE); - if (sched_runnable()) { - mtmsr(msr); - return; - } switch (vers) { case IBM970: case IBM970FX: @@ -589,11 +583,6 @@ cpu_idle_e500(void) msr = mfmsr(); #ifdef E500 - mtmsr(msr & ~PSL_EE); - if (sched_runnable()) { - mtmsr(msr); - return; - } /* Freescale E500 core RM section 6.4.1. */ __asm __volatile("msync; mtmsr %0; isync" :: "r" (msr | PSL_WE));
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