Date: Mon, 27 Sep 2021 14:08:36 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 02a5ee49cb70 - stable/13 - Clean up the arm64 fork_trampoline Message-ID: <202109271408.18RE8aCQ082338@gitrepo.freebsd.org>
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The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=02a5ee49cb70eb0819751fdaa8a40e76ed93b6aa commit 02a5ee49cb70eb0819751fdaa8a40e76ed93b6aa Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2021-08-09 10:03:57 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2021-09-27 08:36:37 +0000 Clean up the arm64 fork_trampoline When exiting to userspace the code is similar to the restore_registers macro in exception.S. Rework it to remove most of the non-style differences. Sponsored by: The FreeBSD Foundation (cherry picked from commit 1791a628a13e0d6f69bc0b52934b05f09c986507) --- sys/arm64/arm64/swtch.S | 38 ++++++++++++++++---------------------- 1 file changed, 16 insertions(+), 22 deletions(-) diff --git a/sys/arm64/arm64/swtch.S b/sys/arm64/arm64/swtch.S index ee64f89502cc..28b6acb430fd 100644 --- a/sys/arm64/arm64/swtch.S +++ b/sys/arm64/arm64/swtch.S @@ -213,7 +213,21 @@ ENTRY(fork_trampoline) mov fp, #0 /* Stack traceback stops here. */ bl _C_LABEL(fork_exit) - /* Restore the registers other than x0 and x1 */ + /* + * Disable interrupts to avoid + * overwriting spsr_el1 and sp_el0 by an IRQ exception. + */ + msr daifset, #10 + + /* Restore sp, lr, elr, and spsr */ + ldp x18, lr, [sp, #TF_SP] + ldp x10, x11, [sp, #TF_ELR] + msr sp_el0, x18 + msr spsr_el1, x11 + msr elr_el1, x10 + + /* Restore the CPU registers */ + ldp x0, x1, [sp, #TF_X + 0 * 8] ldp x2, x3, [sp, #TF_X + 2 * 8] ldp x4, x5, [sp, #TF_X + 4 * 8] ldp x6, x7, [sp, #TF_X + 6 * 8] @@ -222,33 +236,13 @@ ENTRY(fork_trampoline) ldp x12, x13, [sp, #TF_X + 12 * 8] ldp x14, x15, [sp, #TF_X + 14 * 8] ldp x16, x17, [sp, #TF_X + 16 * 8] - ldr x19, [sp, #TF_X + 19 * 8] + ldp x18, x19, [sp, #TF_X + 18 * 8] ldp x20, x21, [sp, #TF_X + 20 * 8] ldp x22, x23, [sp, #TF_X + 22 * 8] ldp x24, x25, [sp, #TF_X + 24 * 8] ldp x26, x27, [sp, #TF_X + 26 * 8] ldp x28, x29, [sp, #TF_X + 28 * 8] - /* - * Disable interrupts to avoid - * overwriting spsr_el1 and sp_el0 by an IRQ exception. - */ - msr daifset, #2 - - /* Restore sp and lr */ - ldp x0, x1, [sp, #TF_SP] - msr sp_el0, x0 - mov lr, x1 - - /* Restore elr and spsr */ - ldp x0, x1, [sp, #TF_ELR] - msr elr_el1, x0 - msr spsr_el1, x1 - - /* Finally x0 and x1 */ - ldp x0, x1, [sp, #TF_X + 0 * 8] - ldr x18, [sp, #TF_X + 18 * 8] - /* * No need for interrupts reenabling since PSR * will be set to the desired value anyway.
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