Date: Thu, 24 Oct 2013 22:30:48 -0700 From: Adrian Chadd <adrian@freebsd.org> To: "freebsd-wireless@freebsd.org" <freebsd-wireless@freebsd.org> Subject: Fwd: svn commit: r257094 - head/sys/mips/conf Message-ID: <CAJ-VmonJJY=1mvMFSLBFpc0fg5MP55OKEFtsNYcNnsQ=j_xnEA@mail.gmail.com> In-Reply-To: <201310250406.r9P46s8A080761@svn.freebsd.org> References: <201310250406.r9P46s8A080761@svn.freebsd.org>
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https://code.google.com/p/freebsd-wifi-build/wiki/Alfa_Hornet_UB :) -adrian ---------- Forwarded message ---------- From: Adrian Chadd <adrian@freebsd.org> Date: 24 October 2013 21:06 Subject: svn commit: r257094 - head/sys/mips/conf To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Author: adrian Date: Fri Oct 25 04:06:54 2013 New Revision: 257094 URL: http://svnweb.freebsd.org/changeset/base/257094 Log: Add a configuration file and hints file for the Alfa Networks Hornet UB board. This is another AR9331 board similar to the Carambola2. It has different ethernet and LED wiring though. They make a variety of boards that mostly differ on the amount of RAM/flash available. Alfa Networks graciously donated a handful of 64MB RAM/16MB flash boards so I can finish off 802.11s support for the AR93xx chips and do up a tech demonstration with it. This is enough to bring up the board. Tested: * Alfa networks UB Hornet board - 64MB ram, 16MB flash version. Thankyou to Alfa Networks for the development boards! Sponsored by: Alfa Networks (hardware only) Added: head/sys/mips/conf/ALFA_HORNET_UB (contents, props changed) head/sys/mips/conf/ALFA_HORNET_UB.hints (contents, props changed) Added: head/sys/mips/conf/ALFA_HORNET_UB ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/mips/conf/ALFA_HORNET_UB Fri Oct 25 04:06:54 2013 (r257094) @@ -0,0 +1,57 @@ +# +# Alfa Networks Hornet UB - an AR933x based SoC wifi device. +# +# http://www.alfa.com.tw/products_show.php?pc=99&ps=50 +# +# This is for the 64MB RAM/16MB flash part. They also +# do various other versions; they have different RAM/flash +# configurations. +# +# * AR9330 SoC +# * 64MB RAM +# * 16MB flash +# * Integrated 1x1 2GHz wifi and 10/100 bridge +# +# $FreeBSD$ +# + +# Include the default AR933x parameters +include "AR933X_BASE" + +ident ALFA_HORNET_UB + +# Override hints with board values +hints "ALFA_HORNET_UB.hints" + +# Board memory - 64MB +options AR71XX_REALMEM=(64*1024*1024) + +# i2c GPIO bus +#device gpioiic +#device iicbb +#device iicbus +#device iic + +# Options required for miiproxy and mdiobus +options ARGE_MDIO # Export an MDIO bus separate from arge +device miiproxy # MDIO bus <-> MII PHY rendezvous + +device etherswitch +device arswitch + +# read MSDOS formatted disks - USB +#options MSDOSFS + +# Enable the uboot environment stuff rather then the +# redboot stuff. +options AR71XX_ENV_UBOOT + +# uzip - to boot natively from flash +device geom_uncompress +options GEOM_UNCOMPRESS + +# Used for the static uboot partition map +device geom_map + +# Boot off of the rootfs, as defined in the geom_map setup. +options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\" Added: head/sys/mips/conf/ALFA_HORNET_UB.hints ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/mips/conf/ALFA_HORNET_UB.hints Fri Oct 25 04:06:54 2013 (r257094) @@ -0,0 +1,105 @@ +# +# This file adds to the values in AR933X_BASE.hints +# +# $FreeBSD$ + +# mdiobus on arge1 +hint.argemdio.0.at="nexus0" +hint.argemdio.0.maddr=0x1a000000 +hint.argemdio.0.msize=0x1000 +hint.argemdio.0.order=0 + +# There's no need to set the ar933x GMAC configuration bits. +# This just creates a switch instance and correctly uses it. + +# Embedded Atheros Switch +hint.arswitch.0.at="mdio0" + +# XXX this should really say it's an AR933x switch, as there +# are some vlan specific differences here! +hint.arswitch.0.is_7240=1 +hint.arswitch.0.numphys=4 +hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY +hint.arswitch.0.is_rgmii=0 +hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII + +# arge0 - MII, autoneg, phy(4) +hint.arge.0.phymask=0x10 # PHY4 +hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus + +# arge1 - GMII, 1000/full +hint.arge.1.phymask=0x0 # No directly mapped PHYs +hint.arge.1.media=1000 +hint.arge.1.fduplex=1 + +# Where the ART is - last 64k in the flash +# 0x9fff1000 ? +hint.ath.0.eepromaddr=0x1fff0000 +hint.ath.0.eepromsize=16384 + +# The board 16MiB flash layout in uboot env: +# +# 256k (uboot), 64k (uboot-env), 14336k (rootfs), 1600k (kernel), 64k (NVRAM), 64k (ART) + +# However, it boots from 0x9f050000, which is the front of the flsah! +# Thus the kernel/rootfs are switched around. + +# 256KB +hint.map.0.at="flash/spi0" +hint.map.0.start=0x00000000 +hint.map.0.end=0x000040000 +hint.map.0.name="uboot" +hint.map.0.readonly=1 + +# 64KB +hint.map.1.at="flash/spi0" +hint.map.1.start=0x00040000 +hint.map.1.end=0x00050000 +hint.map.1.name="uboot-env" +hint.map.1.readonly=0 + +# 1600KB +hint.map.2.at="flash/spi0" +hint.map.2.start=0x00050000 +hint.map.2.end=0x001e0000 +hint.map.2.name="kernel" +hint.map.2.readonly=0 + +# 14336KB +hint.map.3.at="flash/spi0" +hint.map.3.start=0x001e0000 +hint.map.3.end=0x00fe0000 +hint.map.3.name="rootfs" +hint.map.3.readonly=0 + +# NVRAM +hint.map.4.at="flash/spi0" +hint.map.4.start=0x00fe0000 +hint.map.4.end=0x00ff0000 +hint.map.4.name="cfg" +hint.map.4.readonly=0 + +# This is radio calibration section. It is (or should be!) unique +# for each board, to take into account thermal and electrical differences +# as well as the regulatory compliance data. +# +hint.map.5.at="flash/spi0" +hint.map.5.start=0x00ff0000 +hint.map.5.end=0x01000000 +hint.map.5.name="art" +hint.map.5.readonly=1 + +# GPIO specific configuration block + +# Don't flip on anything that isn't already enabled. +# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're +# not used here. +hint.gpio.0.function_set=0x00000000 +hint.gpio.0.function_clear=0x00000000 + +# These are the GPIO LEDs and buttons which can be software controlled. +#hint.gpio.0.pinmask=0x001c02ae +#hint.gpio.0.pinmask=0x00001803 + +# XXX TODO: the button and LEDs! +
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