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Date:      Mon, 7 Oct 2013 13:15:16 -0700
From:      Adrian Chadd <adrian@freebsd.org>
To:        Zbigniew Bodek <zbb@freebsd.org>
Cc:        "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org>, freebsd-current <freebsd-current@freebsd.org>, "freebsd-embedded@freebsd.org" <freebsd-embedded@freebsd.org>
Subject:   Re: Changes to UART ns8250
Message-ID:  <CAJ-VmokZHvLpUvvD9s8ES0PT%2BE1oVfHWhdbiXF77osBOK2_Yqg@mail.gmail.com>
In-Reply-To: <CALF_Tx=AwVnr0d75-K-yu97iVgmTJC7aaABoix73zHD%2B5eKJnQ@mail.gmail.com>
References:  <CALF_Tx=AwVnr0d75-K-yu97iVgmTJC7aaABoix73zHD%2B5eKJnQ@mail.gmail.com>

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Hi,

You should add:

* a loop counter, to break out after a while;
* a DELAY(1) or something.



-adrian



On 7 October 2013 12:54, Zbigniew Bodek <zbb@freebsd.org> wrote:

> Hello.
>
> I would like to present a patch for ns8250 serial that I would like to
> commit in the near future (if there are no objections).
>
> The patch is fixing newest DesignWare UART with busy detection.
> During frequency divisors configuration when UART is busy transferring or
> receiving data, line control register manipulation will not take effect.
> Therefore, we will not set divisor latch access bit and we will corrupt LCR
> instead of configuring divisors.
> It is necessary to wait until UART finishes all transfers to proceed with
> the configuration.
>
> This was detected on Armada XP as UART fails on this issue 100/100
> attempts.
> The patch was tested by kevlo@ and me and it works on our Armada XP -
> based
> systems.
>
> Please send your comment or remarks if there are any.
>
> Best regards
> Zbigniew Bodek
>
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