Date: Thu, 4 Sep 2014 20:48:16 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r271133 - in head/sys/gnu/dts/include/dt-bindings: clk clock dma gpio input interrupt-controller mfd phy pinctrl pwm reset reset-controller soc sound spmi thermal Message-ID: <201409042048.s84KmGsG042814@svn.freebsd.org>
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Author: imp Date: Thu Sep 4 20:48:16 2014 New Revision: 271133 URL: http://svnweb.freebsd.org/changeset/base/271133 Log: Update bindings to latest vendor branch representing 3.17-rc2 level of Linux DTS API. Added: - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clk/ti-dra7-atl.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/at91.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm21664.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm281xx.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2q.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/clps711x-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos-audss-clk.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos3250.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos5260-clk.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos5410.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/hip04-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/hix5hd2-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/imx1-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/imx21-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/imx27-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/imx6qdl-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/imx6sx-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/lsi,axm5516-clks.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/qcom,gcc-apq8084.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/qcom,gcc-ipq806x.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/qcom,mmcc-apq8084.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/r7s72100-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/r8a7779-clock.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/rk3066a-cru.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/rk3188-cru-common.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/rk3188-cru.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/rk3288-cru.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/s3c2410.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/s3c2412.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/s3c2443.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/s5pv210-audss.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/s5pv210.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/stih415-clks.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/clock/stih416-clks.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/dma/nbpfaxi.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/mfd/palmas.h - copied from r270866, vendor/device-tree/dist/include/dt-bindings/phy/ - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h - copied from r270866, vendor/device-tree/dist/include/dt-bindings/reset-controller/ - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/reset/altr,rst-mgr.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/reset/qcom,gcc-apq8084.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/reset/qcom,gcc-ipq806x.h - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/reset/qcom,mmcc-apq8084.h - copied from r270866, vendor/device-tree/dist/include/dt-bindings/soc/ - copied unchanged from r270866, vendor/device-tree/dist/include/dt-bindings/sound/tlv320aic31xx-micbias.h - copied from r270866, vendor/device-tree/dist/include/dt-bindings/spmi/ Directory Properties: head/sys/gnu/dts/include/dt-bindings/clk/ti-dra7-atl.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/at91.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/bcm21664.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/bcm281xx.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/berlin2.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/berlin2q.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/clps711x-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos-audss-clk.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos3250.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos5260-clk.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos5410.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/hip04-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/hix5hd2-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx1-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx21-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx27-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx6qdl-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx6sx-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/lsi,axm5516-clks.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-apq8084.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-ipq806x.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-apq8084.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/r7s72100-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/r8a7779-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/rk3066a-cru.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/rk3188-cru-common.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/rk3188-cru.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/rk3288-cru.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/s3c2410.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/s3c2412.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/s3c2443.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/s5pv210-audss.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/s5pv210.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/stih415-clks.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/stih416-clks.h (props changed) head/sys/gnu/dts/include/dt-bindings/dma/nbpfaxi.h (props changed) head/sys/gnu/dts/include/dt-bindings/mfd/palmas.h (props changed) head/sys/gnu/dts/include/dt-bindings/phy/ (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset-controller/ (props changed) head/sys/gnu/dts/include/dt-bindings/reset/altr,rst-mgr.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-apq8084.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-ipq806x.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-apq8084.h (props changed) head/sys/gnu/dts/include/dt-bindings/soc/ (props changed) head/sys/gnu/dts/include/dt-bindings/sound/tlv320aic31xx-micbias.h (props changed) head/sys/gnu/dts/include/dt-bindings/spmi/ (props changed) Modified: head/sys/gnu/dts/include/dt-bindings/clock/exynos4.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos5250.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos5420.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/exynos5440.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/hi3620-clock.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx6sl-clock.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8960.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8974.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8960.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/r8a7790-clock.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/r8a7791-clock.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/tegra114-car.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/tegra124-car.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/clock/vf610-clock.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/mfd/as3722.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/am43xx.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/dra.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/omap.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8960.h (contents, props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8960.h (contents, props changed) Directory Properties: head/sys/gnu/dts/include/ (props changed) head/sys/gnu/dts/include/dt-bindings/ (props changed) head/sys/gnu/dts/include/dt-bindings/clk/ (props changed) head/sys/gnu/dts/include/dt-bindings/clk/at91.h (props changed) head/sys/gnu/dts/include/dt-bindings/clk/exynos-audss-clk.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/ (props changed) head/sys/gnu/dts/include/dt-bindings/clock/efm32-cmu.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/imx5-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/mpc512x-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,gcc-msm8660.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/qcom,mmcc-msm8974.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/samsung,s3c64xx-clock.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/tegra20-car.h (props changed) head/sys/gnu/dts/include/dt-bindings/clock/tegra30-car.h (props changed) head/sys/gnu/dts/include/dt-bindings/dma/ (props changed) head/sys/gnu/dts/include/dt-bindings/dma/at91.h (props changed) head/sys/gnu/dts/include/dt-bindings/gpio/ (props changed) head/sys/gnu/dts/include/dt-bindings/gpio/gpio.h (props changed) head/sys/gnu/dts/include/dt-bindings/gpio/tegra-gpio.h (props changed) head/sys/gnu/dts/include/dt-bindings/input/ (props changed) head/sys/gnu/dts/include/dt-bindings/input/input.h (props changed) head/sys/gnu/dts/include/dt-bindings/interrupt-controller/ (props changed) head/sys/gnu/dts/include/dt-bindings/interrupt-controller/arm-gic.h (props changed) head/sys/gnu/dts/include/dt-bindings/interrupt-controller/irq.h (props changed) head/sys/gnu/dts/include/dt-bindings/mfd/ (props changed) head/sys/gnu/dts/include/dt-bindings/mfd/dbx500-prcmu.h (props changed) head/sys/gnu/dts/include/dt-bindings/phy/phy-miphy365x.h (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/ (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/am33xx.h (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/at91.h (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/nomadik.h (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/pinctrl-tegra.h (props changed) head/sys/gnu/dts/include/dt-bindings/pinctrl/rockchip.h (props changed) head/sys/gnu/dts/include/dt-bindings/pwm/ (props changed) head/sys/gnu/dts/include/dt-bindings/pwm/pwm.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/ (props changed) head/sys/gnu/dts/include/dt-bindings/reset-controller/stih415-resets.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset-controller/stih416-resets.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8660.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,gcc-msm8974.h (props changed) head/sys/gnu/dts/include/dt-bindings/reset/qcom,mmcc-msm8974.h (props changed) head/sys/gnu/dts/include/dt-bindings/soc/qcom,gsbi.h (props changed) head/sys/gnu/dts/include/dt-bindings/sound/ (props changed) head/sys/gnu/dts/include/dt-bindings/sound/fsl-imx-audmux.h (props changed) head/sys/gnu/dts/include/dt-bindings/spmi/spmi.h (props changed) head/sys/gnu/dts/include/dt-bindings/thermal/ (props changed) head/sys/gnu/dts/include/dt-bindings/thermal/thermal.h (props changed) Copied: head/sys/gnu/dts/include/dt-bindings/clk/ti-dra7-atl.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clk/ti-dra7-atl.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clk/ti-dra7-atl.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clk/ti-dra7-atl.h) @@ -0,0 +1,40 @@ +/* + * This header provides constants for DRA7 ATL (Audio Tracking Logic) + * + * The constants defined in this header are used in dts files + * + * Copyright (C) 2013 Texas Instruments, Inc. + * + * Peter Ujfalusi <peter.ujfalusi@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H +#define _DT_BINDINGS_CLK_DRA7_ATL_H + +#define DRA7_ATL_WS_MCASP1_FSR 0 +#define DRA7_ATL_WS_MCASP1_FSX 1 +#define DRA7_ATL_WS_MCASP2_FSR 2 +#define DRA7_ATL_WS_MCASP2_FSX 3 +#define DRA7_ATL_WS_MCASP3_FSX 4 +#define DRA7_ATL_WS_MCASP4_FSX 5 +#define DRA7_ATL_WS_MCASP5_FSX 6 +#define DRA7_ATL_WS_MCASP6_FSX 7 +#define DRA7_ATL_WS_MCASP7_FSX 8 +#define DRA7_ATL_WS_MCASP8_FSX 9 +#define DRA7_ATL_WS_MCASP8_AHCLKX 10 +#define DRA7_ATL_WS_XREF_CLK3 11 +#define DRA7_ATL_WS_XREF_CLK0 12 +#define DRA7_ATL_WS_XREF_CLK1 13 +#define DRA7_ATL_WS_XREF_CLK2 14 +#define DRA7_ATL_WS_OSC1_X1 15 + +#endif Copied: head/sys/gnu/dts/include/dt-bindings/clock/at91.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/at91.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/at91.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/at91.h) @@ -0,0 +1,22 @@ +/* + * This header provides constants for AT91 pmc status. + * + * The constants defined in this header are being used in dts. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _DT_BINDINGS_CLK_AT91_H +#define _DT_BINDINGS_CLK_AT91_H + +#define AT91_PMC_MOSCS 0 /* MOSCS Flag */ +#define AT91_PMC_LOCKA 1 /* PLLA Lock */ +#define AT91_PMC_LOCKB 2 /* PLLB Lock */ +#define AT91_PMC_MCKRDY 3 /* Master Clock */ +#define AT91_PMC_LOCKU 6 /* UPLL Lock */ +#define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ +#define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ +#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ +#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ + +#endif Copied: head/sys/gnu/dts/include/dt-bindings/clock/bcm21664.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm21664.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/bcm21664.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm21664.h) @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2013 Broadcom Corporation + * Copyright 2013 Linaro Limited + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CLOCK_BCM21664_H +#define _CLOCK_BCM21664_H + +/* + * This file defines the values used to specify clocks provided by + * the clock control units (CCUs) on Broadcom BCM21664 family SoCs. + */ + +/* bcm21664 CCU device tree "compatible" strings */ +#define BCM21664_DT_ROOT_CCU_COMPAT "brcm,bcm21664-root-ccu" +#define BCM21664_DT_AON_CCU_COMPAT "brcm,bcm21664-aon-ccu" +#define BCM21664_DT_MASTER_CCU_COMPAT "brcm,bcm21664-master-ccu" +#define BCM21664_DT_SLAVE_CCU_COMPAT "brcm,bcm21664-slave-ccu" + +/* root CCU clock ids */ + +#define BCM21664_ROOT_CCU_FRAC_1M 0 +#define BCM21664_ROOT_CCU_CLOCK_COUNT 1 + +/* aon CCU clock ids */ + +#define BCM21664_AON_CCU_HUB_TIMER 0 +#define BCM21664_AON_CCU_CLOCK_COUNT 1 + +/* master CCU clock ids */ + +#define BCM21664_MASTER_CCU_SDIO1 0 +#define BCM21664_MASTER_CCU_SDIO2 1 +#define BCM21664_MASTER_CCU_SDIO3 2 +#define BCM21664_MASTER_CCU_SDIO4 3 +#define BCM21664_MASTER_CCU_SDIO1_SLEEP 4 +#define BCM21664_MASTER_CCU_SDIO2_SLEEP 5 +#define BCM21664_MASTER_CCU_SDIO3_SLEEP 6 +#define BCM21664_MASTER_CCU_SDIO4_SLEEP 7 +#define BCM21664_MASTER_CCU_CLOCK_COUNT 8 + +/* slave CCU clock ids */ + +#define BCM21664_SLAVE_CCU_UARTB 0 +#define BCM21664_SLAVE_CCU_UARTB2 1 +#define BCM21664_SLAVE_CCU_UARTB3 2 +#define BCM21664_SLAVE_CCU_BSC1 3 +#define BCM21664_SLAVE_CCU_BSC2 4 +#define BCM21664_SLAVE_CCU_BSC3 5 +#define BCM21664_SLAVE_CCU_BSC4 6 +#define BCM21664_SLAVE_CCU_CLOCK_COUNT 7 + +#endif /* _CLOCK_BCM21664_H */ Copied: head/sys/gnu/dts/include/dt-bindings/clock/bcm281xx.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm281xx.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/bcm281xx.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/bcm281xx.h) @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2013 Broadcom Corporation + * Copyright 2013 Linaro Limited + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CLOCK_BCM281XX_H +#define _CLOCK_BCM281XX_H + +/* + * This file defines the values used to specify clocks provided by + * the clock control units (CCUs) on Broadcom BCM281XX family SoCs. + */ + +/* + * These are the bcm281xx CCU device tree "compatible" strings. + * We're stuck with using "bcm11351" in the string because wild + * cards aren't allowed, and that name was the first one defined + * in this family of devices. + */ +#define BCM281XX_DT_ROOT_CCU_COMPAT "brcm,bcm11351-root-ccu" +#define BCM281XX_DT_AON_CCU_COMPAT "brcm,bcm11351-aon-ccu" +#define BCM281XX_DT_HUB_CCU_COMPAT "brcm,bcm11351-hub-ccu" +#define BCM281XX_DT_MASTER_CCU_COMPAT "brcm,bcm11351-master-ccu" +#define BCM281XX_DT_SLAVE_CCU_COMPAT "brcm,bcm11351-slave-ccu" + +/* root CCU clock ids */ + +#define BCM281XX_ROOT_CCU_FRAC_1M 0 +#define BCM281XX_ROOT_CCU_CLOCK_COUNT 1 + +/* aon CCU clock ids */ + +#define BCM281XX_AON_CCU_HUB_TIMER 0 +#define BCM281XX_AON_CCU_PMU_BSC 1 +#define BCM281XX_AON_CCU_PMU_BSC_VAR 2 +#define BCM281XX_AON_CCU_CLOCK_COUNT 3 + +/* hub CCU clock ids */ + +#define BCM281XX_HUB_CCU_TMON_1M 0 +#define BCM281XX_HUB_CCU_CLOCK_COUNT 1 + +/* master CCU clock ids */ + +#define BCM281XX_MASTER_CCU_SDIO1 0 +#define BCM281XX_MASTER_CCU_SDIO2 1 +#define BCM281XX_MASTER_CCU_SDIO3 2 +#define BCM281XX_MASTER_CCU_SDIO4 3 +#define BCM281XX_MASTER_CCU_USB_IC 4 +#define BCM281XX_MASTER_CCU_HSIC2_48M 5 +#define BCM281XX_MASTER_CCU_HSIC2_12M 6 +#define BCM281XX_MASTER_CCU_CLOCK_COUNT 7 + +/* slave CCU clock ids */ + +#define BCM281XX_SLAVE_CCU_UARTB 0 +#define BCM281XX_SLAVE_CCU_UARTB2 1 +#define BCM281XX_SLAVE_CCU_UARTB3 2 +#define BCM281XX_SLAVE_CCU_UARTB4 3 +#define BCM281XX_SLAVE_CCU_SSP0 4 +#define BCM281XX_SLAVE_CCU_SSP2 5 +#define BCM281XX_SLAVE_CCU_BSC1 6 +#define BCM281XX_SLAVE_CCU_BSC2 7 +#define BCM281XX_SLAVE_CCU_BSC3 8 +#define BCM281XX_SLAVE_CCU_PWM 9 +#define BCM281XX_SLAVE_CCU_CLOCK_COUNT 10 + +#endif /* _CLOCK_BCM281XX_H */ Copied: head/sys/gnu/dts/include/dt-bindings/clock/berlin2.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/berlin2.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2.h) @@ -0,0 +1,45 @@ +/* + * Berlin2 BG2/BG2CD clock tree IDs + */ + +#define CLKID_SYS 0 +#define CLKID_CPU 1 +#define CLKID_DRMFIGO 2 +#define CLKID_CFG 3 +#define CLKID_GFX 4 +#define CLKID_ZSP 5 +#define CLKID_PERIF 6 +#define CLKID_PCUBE 7 +#define CLKID_VSCOPE 8 +#define CLKID_NFC_ECC 9 +#define CLKID_VPP 10 +#define CLKID_APP 11 +#define CLKID_AUDIO0 12 +#define CLKID_AUDIO2 13 +#define CLKID_AUDIO3 14 +#define CLKID_AUDIO1 15 +#define CLKID_GFX3D_CORE 16 +#define CLKID_GFX3D_SYS 17 +#define CLKID_ARC 18 +#define CLKID_VIP 19 +#define CLKID_SDIO0XIN 20 +#define CLKID_SDIO1XIN 21 +#define CLKID_GFX3D_EXTRA 22 +#define CLKID_GC360 23 +#define CLKID_SDIO_DLLMST 24 +#define CLKID_GETH0 25 +#define CLKID_GETH1 26 +#define CLKID_SATA 27 +#define CLKID_AHBAPB 28 +#define CLKID_USB0 29 +#define CLKID_USB1 30 +#define CLKID_PBRIDGE 31 +#define CLKID_SDIO0 32 +#define CLKID_SDIO1 33 +#define CLKID_NFC 34 +#define CLKID_SMEMC 35 +#define CLKID_AUDIOHD 36 +#define CLKID_VIDEO0 37 +#define CLKID_VIDEO1 38 +#define CLKID_VIDEO2 39 +#define CLKID_TWD 40 Copied: head/sys/gnu/dts/include/dt-bindings/clock/berlin2q.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2q.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/berlin2q.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/berlin2q.h) @@ -0,0 +1,31 @@ +/* + * Berlin2 BG2Q clock tree IDs + */ + +#define CLKID_SYS 0 +#define CLKID_DRMFIGO 1 +#define CLKID_CFG 2 +#define CLKID_GFX2D 3 +#define CLKID_ZSP 4 +#define CLKID_PERIF 5 +#define CLKID_PCUBE 6 +#define CLKID_VSCOPE 7 +#define CLKID_NFC_ECC 8 +#define CLKID_VPP 9 +#define CLKID_APP 10 +#define CLKID_SDIO0XIN 11 +#define CLKID_SDIO1XIN 12 +#define CLKID_GFX2DAXI 13 +#define CLKID_GETH0 14 +#define CLKID_SATA 15 +#define CLKID_AHBAPB 16 +#define CLKID_USB0 17 +#define CLKID_USB1 18 +#define CLKID_USB2 19 +#define CLKID_USB3 20 +#define CLKID_PBRIDGE 21 +#define CLKID_SDIO 22 +#define CLKID_NFC 23 +#define CLKID_SMEMC 24 +#define CLKID_PCIE 25 +#define CLKID_TWD 26 Copied: head/sys/gnu/dts/include/dt-bindings/clock/clps711x-clock.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/clps711x-clock.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/clps711x-clock.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/clps711x-clock.h) @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DT_BINDINGS_CLOCK_CLPS711X_H +#define __DT_BINDINGS_CLOCK_CLPS711X_H + +#define CLPS711X_CLK_DUMMY 0 +#define CLPS711X_CLK_CPU 1 +#define CLPS711X_CLK_BUS 2 +#define CLPS711X_CLK_PLL 3 +#define CLPS711X_CLK_TIMERREF 4 +#define CLPS711X_CLK_TIMER1 5 +#define CLPS711X_CLK_TIMER2 6 +#define CLPS711X_CLK_PWM 7 +#define CLPS711X_CLK_SPIREF 8 +#define CLPS711X_CLK_SPI 9 +#define CLPS711X_CLK_UART 10 +#define CLPS711X_CLK_TICK 11 +#define CLPS711X_CLK_MAX 12 + +#endif Copied: head/sys/gnu/dts/include/dt-bindings/clock/exynos-audss-clk.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos-audss-clk.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/exynos-audss-clk.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos-audss-clk.h) @@ -0,0 +1,26 @@ +/* + * This header provides constants for Samsung audio subsystem + * clock controller. + * + * The constants defined in this header are being used in dts + * and exynos audss driver. + */ + +#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H +#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H + +#define EXYNOS_MOUT_AUDSS 0 +#define EXYNOS_MOUT_I2S 1 +#define EXYNOS_DOUT_SRP 2 +#define EXYNOS_DOUT_AUD_BUS 3 +#define EXYNOS_DOUT_I2S 4 +#define EXYNOS_SRP_CLK 5 +#define EXYNOS_I2S_BUS 6 +#define EXYNOS_SCLK_I2S 7 +#define EXYNOS_PCM_BUS 8 +#define EXYNOS_SCLK_PCM 9 +#define EXYNOS_ADMA 10 + +#define EXYNOS_AUDSS_MAX_CLKS 11 + +#endif Copied: head/sys/gnu/dts/include/dt-bindings/clock/exynos3250.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos3250.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/exynos3250.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos3250.h) @@ -0,0 +1,258 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Tomasz Figa <t.figa@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants for Samsung Exynos3250 clock controllers. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + + +/* + * Main CMU + */ + +#define CLK_OSCSEL 1 +#define CLK_FIN_PLL 2 +#define CLK_FOUT_APLL 3 +#define CLK_FOUT_VPLL 4 +#define CLK_FOUT_UPLL 5 +#define CLK_FOUT_MPLL 6 + +/* Muxes */ +#define CLK_MOUT_MPLL_USER_L 16 +#define CLK_MOUT_GDL 17 +#define CLK_MOUT_MPLL_USER_R 18 +#define CLK_MOUT_GDR 19 +#define CLK_MOUT_EBI 20 +#define CLK_MOUT_ACLK_200 21 +#define CLK_MOUT_ACLK_160 22 +#define CLK_MOUT_ACLK_100 23 +#define CLK_MOUT_ACLK_266_1 24 +#define CLK_MOUT_ACLK_266_0 25 +#define CLK_MOUT_ACLK_266 26 +#define CLK_MOUT_VPLL 27 +#define CLK_MOUT_EPLL_USER 28 +#define CLK_MOUT_EBI_1 29 +#define CLK_MOUT_UPLL 30 +#define CLK_MOUT_ACLK_400_MCUISP_SUB 31 +#define CLK_MOUT_MPLL 32 +#define CLK_MOUT_ACLK_400_MCUISP 33 +#define CLK_MOUT_VPLLSRC 34 +#define CLK_MOUT_CAM1 35 +#define CLK_MOUT_CAM_BLK 36 +#define CLK_MOUT_MFC 37 +#define CLK_MOUT_MFC_1 38 +#define CLK_MOUT_MFC_0 39 +#define CLK_MOUT_G3D 40 +#define CLK_MOUT_G3D_1 41 +#define CLK_MOUT_G3D_0 42 +#define CLK_MOUT_MIPI0 43 +#define CLK_MOUT_FIMD0 44 +#define CLK_MOUT_UART_ISP 45 +#define CLK_MOUT_SPI1_ISP 46 +#define CLK_MOUT_SPI0_ISP 47 +#define CLK_MOUT_TSADC 48 +#define CLK_MOUT_MMC1 49 +#define CLK_MOUT_MMC0 50 +#define CLK_MOUT_UART1 51 +#define CLK_MOUT_UART0 52 +#define CLK_MOUT_SPI1 53 +#define CLK_MOUT_SPI0 54 +#define CLK_MOUT_AUDIO 55 +#define CLK_MOUT_MPLL_USER_C 56 +#define CLK_MOUT_HPM 57 +#define CLK_MOUT_CORE 58 +#define CLK_MOUT_APLL 59 +#define CLK_MOUT_ACLK_266_SUB 60 + +/* Dividers */ +#define CLK_DIV_GPL 64 +#define CLK_DIV_GDL 65 +#define CLK_DIV_GPR 66 +#define CLK_DIV_GDR 67 +#define CLK_DIV_MPLL_PRE 68 +#define CLK_DIV_ACLK_400_MCUISP 69 +#define CLK_DIV_EBI 70 +#define CLK_DIV_ACLK_200 71 +#define CLK_DIV_ACLK_160 72 +#define CLK_DIV_ACLK_100 73 +#define CLK_DIV_ACLK_266 74 +#define CLK_DIV_CAM1 75 +#define CLK_DIV_CAM_BLK 76 +#define CLK_DIV_MFC 77 +#define CLK_DIV_G3D 78 +#define CLK_DIV_MIPI0_PRE 79 +#define CLK_DIV_MIPI0 80 +#define CLK_DIV_FIMD0 81 +#define CLK_DIV_UART_ISP 82 +#define CLK_DIV_SPI1_ISP_PRE 83 +#define CLK_DIV_SPI1_ISP 84 +#define CLK_DIV_SPI0_ISP_PRE 85 +#define CLK_DIV_SPI0_ISP 86 +#define CLK_DIV_TSADC_PRE 87 +#define CLK_DIV_TSADC 88 +#define CLK_DIV_MMC1_PRE 89 +#define CLK_DIV_MMC1 90 +#define CLK_DIV_MMC0_PRE 91 +#define CLK_DIV_MMC0 92 +#define CLK_DIV_UART1 93 +#define CLK_DIV_UART0 94 +#define CLK_DIV_SPI1_PRE 95 +#define CLK_DIV_SPI1 96 +#define CLK_DIV_SPI0_PRE 97 +#define CLK_DIV_SPI0 98 +#define CLK_DIV_PCM 99 +#define CLK_DIV_AUDIO 100 +#define CLK_DIV_I2S 101 +#define CLK_DIV_CORE2 102 +#define CLK_DIV_APLL 103 +#define CLK_DIV_PCLK_DBG 104 +#define CLK_DIV_ATB 105 +#define CLK_DIV_COREM 106 +#define CLK_DIV_CORE 107 +#define CLK_DIV_HPM 108 +#define CLK_DIV_COPY 109 + +/* Gates */ +#define CLK_ASYNC_G3D 128 +#define CLK_ASYNC_MFCL 129 +#define CLK_PPMULEFT 130 +#define CLK_GPIO_LEFT 131 +#define CLK_ASYNC_ISPMX 132 +#define CLK_ASYNC_FSYSD 133 +#define CLK_ASYNC_LCD0X 134 +#define CLK_ASYNC_CAMX 135 +#define CLK_PPMURIGHT 136 +#define CLK_GPIO_RIGHT 137 +#define CLK_MONOCNT 138 +#define CLK_TZPC6 139 +#define CLK_PROVISIONKEY1 140 +#define CLK_PROVISIONKEY0 141 +#define CLK_CMU_ISPPART 142 +#define CLK_TMU_APBIF 143 +#define CLK_KEYIF 144 +#define CLK_RTC 145 +#define CLK_WDT 146 +#define CLK_MCT 147 +#define CLK_SECKEY 148 +#define CLK_TZPC5 149 +#define CLK_TZPC4 150 +#define CLK_TZPC3 151 +#define CLK_TZPC2 152 +#define CLK_TZPC1 153 +#define CLK_TZPC0 154 +#define CLK_CMU_COREPART 155 +#define CLK_CMU_TOPPART 156 +#define CLK_PMU_APBIF 157 +#define CLK_SYSREG 158 +#define CLK_CHIP_ID 159 +#define CLK_QEJPEG 160 +#define CLK_PIXELASYNCM1 161 +#define CLK_PIXELASYNCM0 162 +#define CLK_PPMUCAMIF 163 +#define CLK_QEM2MSCALER 164 +#define CLK_QEGSCALER1 165 +#define CLK_QEGSCALER0 166 +#define CLK_SMMUJPEG 167 +#define CLK_SMMUM2M2SCALER 168 +#define CLK_SMMUGSCALER1 169 +#define CLK_SMMUGSCALER0 170 +#define CLK_JPEG 171 +#define CLK_M2MSCALER 172 +#define CLK_GSCALER1 173 +#define CLK_GSCALER0 174 +#define CLK_QEMFC 175 +#define CLK_PPMUMFC_L 176 +#define CLK_SMMUMFC_L 177 +#define CLK_MFC 178 +#define CLK_SMMUG3D 179 +#define CLK_QEG3D 180 +#define CLK_PPMUG3D 181 +#define CLK_G3D 182 +#define CLK_QE_CH1_LCD 183 +#define CLK_QE_CH0_LCD 184 +#define CLK_PPMULCD0 185 +#define CLK_SMMUFIMD0 186 +#define CLK_DSIM0 187 +#define CLK_FIMD0 188 +#define CLK_CAM1 189 +#define CLK_UART_ISP_TOP 190 +#define CLK_SPI1_ISP_TOP 191 +#define CLK_SPI0_ISP_TOP 192 +#define CLK_TSADC 193 +#define CLK_PPMUFILE 194 +#define CLK_USBOTG 195 +#define CLK_USBHOST 196 +#define CLK_SROMC 197 +#define CLK_SDMMC1 198 +#define CLK_SDMMC0 199 +#define CLK_PDMA1 200 +#define CLK_PDMA0 201 +#define CLK_PWM 202 +#define CLK_PCM 203 +#define CLK_I2S 204 +#define CLK_SPI1 205 +#define CLK_SPI0 206 +#define CLK_I2C7 207 +#define CLK_I2C6 208 +#define CLK_I2C5 209 +#define CLK_I2C4 210 +#define CLK_I2C3 211 +#define CLK_I2C2 212 +#define CLK_I2C1 213 +#define CLK_I2C0 214 +#define CLK_UART1 215 +#define CLK_UART0 216 +#define CLK_BLOCK_LCD 217 +#define CLK_BLOCK_G3D 218 +#define CLK_BLOCK_MFC 219 +#define CLK_BLOCK_CAM 220 +#define CLK_SMIES 221 + +/* Special clocks */ +#define CLK_SCLK_JPEG 224 +#define CLK_SCLK_M2MSCALER 225 +#define CLK_SCLK_GSCALER1 226 +#define CLK_SCLK_GSCALER0 227 +#define CLK_SCLK_MFC 228 +#define CLK_SCLK_G3D 229 +#define CLK_SCLK_MIPIDPHY2L 230 +#define CLK_SCLK_MIPI0 231 +#define CLK_SCLK_FIMD0 232 +#define CLK_SCLK_CAM1 233 +#define CLK_SCLK_UART_ISP 234 +#define CLK_SCLK_SPI1_ISP 235 +#define CLK_SCLK_SPI0_ISP 236 +#define CLK_SCLK_UPLL 237 +#define CLK_SCLK_TSADC 238 +#define CLK_SCLK_EBI 239 +#define CLK_SCLK_MMC1 240 +#define CLK_SCLK_MMC0 241 +#define CLK_SCLK_I2S 242 +#define CLK_SCLK_PCM 243 +#define CLK_SCLK_SPI1 244 +#define CLK_SCLK_SPI0 245 +#define CLK_SCLK_UART1 246 +#define CLK_SCLK_UART0 247 + +/* + * Total number of clocks of main CMU. + * NOTE: Must be equal to last clock ID increased by one. + */ +#define CLK_NR_CLKS 248 + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H */ Modified: head/sys/gnu/dts/include/dt-bindings/clock/exynos4.h ============================================================================== --- head/sys/gnu/dts/include/dt-bindings/clock/exynos4.h Thu Sep 4 20:47:14 2014 (r271132) +++ head/sys/gnu/dts/include/dt-bindings/clock/exynos4.h Thu Sep 4 20:48:16 2014 (r271133) @@ -1,6 +1,6 @@ /* * Copyright (c) 2013 Samsung Electronics Co., Ltd. - * Author: Andrzej Haja <a.hajda@samsung.com> + * Author: Andrzej Hajda <a.hajda@samsung.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -33,6 +33,12 @@ #define CLK_MOUT_MPLL_USER_C 18 /* Exynos4x12 only */ #define CLK_MOUT_CORE 19 #define CLK_MOUT_APLL 20 +#define CLK_SCLK_HDMIPHY 22 +#define CLK_OUT_DMC 23 +#define CLK_OUT_TOP 24 +#define CLK_OUT_LEFTBUS 25 +#define CLK_OUT_RIGHTBUS 26 +#define CLK_OUT_CPU 27 /* gate for special clocks (sclk) */ #define CLK_SCLK_FIMC0 128 @@ -181,7 +187,6 @@ #define CLK_KEYIF 347 #define CLK_AUDSS 348 #define CLK_MIPI_HSI 349 /* Exynos4210 only */ -#define CLK_MDMA2 350 /* Exynos4210 only */ #define CLK_PIXELASYNCM0 351 #define CLK_PIXELASYNCM1 352 #define CLK_FIMC_LITE0 353 /* Exynos4x12 only */ @@ -230,6 +235,24 @@ #define CLK_MOUT_G3D 394 #define CLK_ACLK400_MCUISP 395 /* Exynos4x12 only */ +/* gate clocks - ppmu */ +#define CLK_PPMULEFT 400 +#define CLK_PPMURIGHT 401 +#define CLK_PPMUCAMIF 402 +#define CLK_PPMUTV 403 +#define CLK_PPMUMFC_L 404 +#define CLK_PPMUMFC_R 405 +#define CLK_PPMUG3D 406 +#define CLK_PPMUIMAGE 407 +#define CLK_PPMULCD0 408 +#define CLK_PPMULCD1 409 /* Exynos4210 only */ +#define CLK_PPMUFILE 410 +#define CLK_PPMUGPS 411 +#define CLK_PPMUDMC0 412 +#define CLK_PPMUDMC1 413 +#define CLK_PPMUCPU 414 +#define CLK_PPMUACP 415 + /* div clocks */ #define CLK_DIV_ISP0 450 /* Exynos4x12 only */ #define CLK_DIV_ISP1 451 /* Exynos4x12 only */ Modified: head/sys/gnu/dts/include/dt-bindings/clock/exynos5250.h ============================================================================== --- head/sys/gnu/dts/include/dt-bindings/clock/exynos5250.h Thu Sep 4 20:47:14 2014 (r271132) +++ head/sys/gnu/dts/include/dt-bindings/clock/exynos5250.h Thu Sep 4 20:48:16 2014 (r271133) @@ -1,6 +1,6 @@ /* * Copyright (c) 2013 Samsung Electronics Co., Ltd. - * Author: Andrzej Haja <a.hajda@samsung.com> + * Author: Andrzej Hajda <a.hajda@samsung.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -150,11 +150,30 @@ #define CLK_G2D 345 #define CLK_MDMA0 346 #define CLK_SMMU_MDMA0 347 +#define CLK_SSS 348 +#define CLK_G3D 349 +#define CLK_SMMU_TV 350 +#define CLK_SMMU_FIMD1 351 +#define CLK_SMMU_2D 352 +#define CLK_SMMU_FIMC_ISP 353 +#define CLK_SMMU_FIMC_DRC 354 +#define CLK_SMMU_FIMC_SCC 355 +#define CLK_SMMU_FIMC_SCP 356 +#define CLK_SMMU_FIMC_FD 357 +#define CLK_SMMU_FIMC_MCU 358 +#define CLK_SMMU_FIMC_ODC 359 +#define CLK_SMMU_FIMC_DIS0 360 +#define CLK_SMMU_FIMC_DIS1 361 +#define CLK_SMMU_FIMC_3DNR 362 +#define CLK_SMMU_FIMC_LITE0 363 +#define CLK_SMMU_FIMC_LITE1 364 +#define CLK_CAMIF_TOP 365 /* mux clocks */ #define CLK_MOUT_HDMI 1024 +#define CLK_MOUT_GPLL 1025 /* must be greater than maximal clock id */ -#define CLK_NR_CLKS 1025 +#define CLK_NR_CLKS 1026 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */ Copied: head/sys/gnu/dts/include/dt-bindings/clock/exynos5260-clk.h (from r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos5260-clk.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/gnu/dts/include/dt-bindings/clock/exynos5260-clk.h Thu Sep 4 20:48:16 2014 (r271133, copy of r270866, vendor/device-tree/dist/include/dt-bindings/clock/exynos5260-clk.h) @@ -0,0 +1,469 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Rahul Sharma <rahul.sharma@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Provides Constants for Exynos5260 clocks. +*/ + +#ifndef _DT_BINDINGS_CLK_EXYNOS5260_H +#define _DT_BINDINGS_CLK_EXYNOS5260_H + +/* Clock names: <cmu><type><IP> */ + +/* List Of Clocks For CMU_TOP */ + +#define TOP_FOUT_DISP_PLL 1 +#define TOP_FOUT_AUD_PLL 2 +#define TOP_MOUT_AUDTOP_PLL_USER 3 +#define TOP_MOUT_AUD_PLL 4 +#define TOP_MOUT_DISP_PLL 5 +#define TOP_MOUT_BUSTOP_PLL_USER 6 +#define TOP_MOUT_MEMTOP_PLL_USER 7 +#define TOP_MOUT_MEDIATOP_PLL_USER 8 +#define TOP_MOUT_DISP_DISP_333 9 +#define TOP_MOUT_ACLK_DISP_333 10 +#define TOP_MOUT_DISP_DISP_222 11 +#define TOP_MOUT_ACLK_DISP_222 12 +#define TOP_MOUT_DISP_MEDIA_PIXEL 13 +#define TOP_MOUT_FIMD1 14 +#define TOP_MOUT_SCLK_PERI_SPI0_CLK 15 +#define TOP_MOUT_SCLK_PERI_SPI1_CLK 16 +#define TOP_MOUT_SCLK_PERI_SPI2_CLK 17 +#define TOP_MOUT_SCLK_PERI_UART0_UCLK 18 +#define TOP_MOUT_SCLK_PERI_UART2_UCLK 19 +#define TOP_MOUT_SCLK_PERI_UART1_UCLK 20 +#define TOP_MOUT_BUS4_BUSTOP_100 21 +#define TOP_MOUT_BUS4_BUSTOP_400 22 +#define TOP_MOUT_BUS3_BUSTOP_100 23 +#define TOP_MOUT_BUS3_BUSTOP_400 24 +#define TOP_MOUT_BUS2_BUSTOP_400 25 +#define TOP_MOUT_BUS2_BUSTOP_100 26 +#define TOP_MOUT_BUS1_BUSTOP_100 27 +#define TOP_MOUT_BUS1_BUSTOP_400 28 +#define TOP_MOUT_SCLK_FSYS_USB 29 +#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A 30 +#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A 31 +#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A 32 +#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B 33 +#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B 34 +#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B 35 +#define TOP_MOUT_ACLK_ISP1_266 36 +#define TOP_MOUT_ISP1_MEDIA_266 37 +#define TOP_MOUT_ACLK_ISP1_400 38 +#define TOP_MOUT_ISP1_MEDIA_400 39 +#define TOP_MOUT_SCLK_ISP1_SPI0 40 +#define TOP_MOUT_SCLK_ISP1_SPI1 41 +#define TOP_MOUT_SCLK_ISP1_UART 42 +#define TOP_MOUT_SCLK_ISP1_SENSOR2 43 +#define TOP_MOUT_SCLK_ISP1_SENSOR1 44 +#define TOP_MOUT_SCLK_ISP1_SENSOR0 45 +#define TOP_MOUT_ACLK_MFC_333 46 +#define TOP_MOUT_MFC_BUSTOP_333 47 +#define TOP_MOUT_ACLK_G2D_333 48 +#define TOP_MOUT_G2D_BUSTOP_333 49 +#define TOP_MOUT_ACLK_GSCL_FIMC 50 +#define TOP_MOUT_GSCL_BUSTOP_FIMC 51 +#define TOP_MOUT_ACLK_GSCL_333 52 +#define TOP_MOUT_GSCL_BUSTOP_333 53 +#define TOP_MOUT_ACLK_GSCL_400 54 +#define TOP_MOUT_M2M_MEDIATOP_400 55 +#define TOP_DOUT_ACLK_MFC_333 56 +#define TOP_DOUT_ACLK_G2D_333 57 +#define TOP_DOUT_SCLK_ISP1_SENSOR2_A 58 +#define TOP_DOUT_SCLK_ISP1_SENSOR1_A 59 +#define TOP_DOUT_SCLK_ISP1_SENSOR0_A 60 +#define TOP_DOUT_ACLK_GSCL_FIMC 61 +#define TOP_DOUT_ACLK_GSCL_400 62 +#define TOP_DOUT_ACLK_GSCL_333 63 +#define TOP_DOUT_SCLK_ISP1_SPI0_B 64 +#define TOP_DOUT_SCLK_ISP1_SPI0_A 65 +#define TOP_DOUT_ACLK_ISP1_400 66 +#define TOP_DOUT_ACLK_ISP1_266 67 +#define TOP_DOUT_SCLK_ISP1_UART 68 +#define TOP_DOUT_SCLK_ISP1_SPI1_B 69 +#define TOP_DOUT_SCLK_ISP1_SPI1_A 70 +#define TOP_DOUT_SCLK_ISP1_SENSOR2_B 71 +#define TOP_DOUT_SCLK_ISP1_SENSOR1_B 72 +#define TOP_DOUT_SCLK_ISP1_SENSOR0_B 73 +#define TOP_DOUTTOP__SCLK_HPM_TARGETCLK 74 +#define TOP_DOUT_SCLK_DISP_PIXEL 75 +#define TOP_DOUT_ACLK_DISP_222 76 +#define TOP_DOUT_ACLK_DISP_333 77 +#define TOP_DOUT_ACLK_BUS4_100 78 +#define TOP_DOUT_ACLK_BUS4_400 79 +#define TOP_DOUT_ACLK_BUS3_100 80 +#define TOP_DOUT_ACLK_BUS3_400 81 +#define TOP_DOUT_ACLK_BUS2_100 82 +#define TOP_DOUT_ACLK_BUS2_400 83 +#define TOP_DOUT_ACLK_BUS1_100 84 +#define TOP_DOUT_ACLK_BUS1_400 85 +#define TOP_DOUT_SCLK_PERI_SPI1_B 86 +#define TOP_DOUT_SCLK_PERI_SPI1_A 87 +#define TOP_DOUT_SCLK_PERI_SPI0_B 88 +#define TOP_DOUT_SCLK_PERI_SPI0_A 89 +#define TOP_DOUT_SCLK_PERI_UART0 90 +#define TOP_DOUT_SCLK_PERI_UART2 91 +#define TOP_DOUT_SCLK_PERI_UART1 92 +#define TOP_DOUT_SCLK_PERI_SPI2_B 93 +#define TOP_DOUT_SCLK_PERI_SPI2_A 94 +#define TOP_DOUT_ACLK_PERI_AUD 95 +#define TOP_DOUT_ACLK_PERI_66 96 +#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_B 97 +#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_A 98 +#define TOP_DOUT_SCLK_FSYS_USBDRD30_SUSPEND_CLK 99 +#define TOP_DOUT_ACLK_FSYS_200 100 +#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_B 101 +#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_A 102 +#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_B 103 +#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_A 104 +#define TOP_SCLK_FIMD1 105 +#define TOP_SCLK_MMC2 106 +#define TOP_SCLK_MMC1 107 +#define TOP_SCLK_MMC0 108 +#define PHYCLK_DPTX_PHY_CH3_TXD_CLK 109 +#define PHYCLK_DPTX_PHY_CH2_TXD_CLK 110 +#define PHYCLK_DPTX_PHY_CH1_TXD_CLK 111 +#define PHYCLK_DPTX_PHY_CH0_TXD_CLK 112 +#define phyclk_hdmi_phy_tmds_clko 113 +#define PHYCLK_HDMI_PHY_PIXEL_CLKO 114 +#define PHYCLK_HDMI_LINK_O_TMDS_CLKHI 115 +#define PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS 116 +#define PHYCLK_DPTX_PHY_O_REF_CLK_24M 117 +#define PHYCLK_DPTX_PHY_CLK_DIV2 118 +#define PHYCLK_MIPI_DPHY_4L_M_RXCLKESC0 119 +#define PHYCLK_USBHOST20_PHY_PHYCLOCK 120 +#define PHYCLK_USBHOST20_PHY_FREECLK 121 +#define PHYCLK_USBHOST20_PHY_CLK48MOHCI 122 +#define PHYCLK_USBDRD30_UDRD30_PIPE_PCLK 123 +#define PHYCLK_USBDRD30_UDRD30_PHYCLOCK 124 +#define TOP_NR_CLK 125 + + +/* List Of Clocks For CMU_EGL */ + +#define EGL_FOUT_EGL_PLL 1 +#define EGL_FOUT_EGL_DPLL 2 +#define EGL_MOUT_EGL_B 3 +#define EGL_MOUT_EGL_PLL 4 +#define EGL_DOUT_EGL_PLL 5 +#define EGL_DOUT_EGL_PCLK_DBG 6 +#define EGL_DOUT_EGL_ATCLK 7 +#define EGL_DOUT_PCLK_EGL 8 +#define EGL_DOUT_ACLK_EGL 9 +#define EGL_DOUT_EGL2 10 +#define EGL_DOUT_EGL1 11 +#define EGL_NR_CLK 12 + + +/* List Of Clocks For CMU_KFC */ + +#define KFC_FOUT_KFC_PLL 1 +#define KFC_MOUT_KFC_PLL 2 +#define KFC_MOUT_KFC 3 +#define KFC_DOUT_KFC_PLL 4 +#define KFC_DOUT_PCLK_KFC 5 +#define KFC_DOUT_ACLK_KFC 6 +#define KFC_DOUT_KFC_PCLK_DBG 7 +#define KFC_DOUT_KFC_ATCLK 8 +#define KFC_DOUT_KFC2 9 +#define KFC_DOUT_KFC1 10 +#define KFC_NR_CLK 11 + + +/* List Of Clocks For CMU_MIF */ + +#define MIF_FOUT_MEM_PLL 1 +#define MIF_FOUT_MEDIA_PLL 2 +#define MIF_FOUT_BUS_PLL 3 +#define MIF_MOUT_CLK2X_PHY 4 +#define MIF_MOUT_MIF_DREX2X 5 +#define MIF_MOUT_CLKM_PHY 6 +#define MIF_MOUT_MIF_DREX 7 +#define MIF_MOUT_MEDIA_PLL 8 +#define MIF_MOUT_BUS_PLL 9 +#define MIF_MOUT_MEM_PLL 10 +#define MIF_DOUT_ACLK_BUS_100 11 +#define MIF_DOUT_ACLK_BUS_200 12 +#define MIF_DOUT_ACLK_MIF_466 13 +#define MIF_DOUT_CLK2X_PHY 14 +#define MIF_DOUT_CLKM_PHY 15 +#define MIF_DOUT_BUS_PLL 16 +#define MIF_DOUT_MEM_PLL 17 +#define MIF_DOUT_MEDIA_PLL 18 +#define MIF_CLK_LPDDR3PHY_WRAP1 19 +#define MIF_CLK_LPDDR3PHY_WRAP0 20 +#define MIF_CLK_MONOCNT 21 +#define MIF_CLK_MIF_RTC 22 +#define MIF_CLK_DREX1 23 +#define MIF_CLK_DREX0 24 +#define MIF_CLK_INTMEM 25 +#define MIF_SCLK_LPDDR3PHY_WRAP_U1 26 +#define MIF_SCLK_LPDDR3PHY_WRAP_U0 27 +#define MIF_NR_CLK 28 + + +/* List Of Clocks For CMU_G3D */ + +#define G3D_FOUT_G3D_PLL 1 +#define G3D_MOUT_G3D_PLL 2 +#define G3D_DOUT_PCLK_G3D 3 +#define G3D_DOUT_ACLK_G3D 4 +#define G3D_CLK_G3D_HPM 5 +#define G3D_CLK_G3D 6 +#define G3D_NR_CLK 7 + + +/* List Of Clocks For CMU_AUD */ + +#define AUD_MOUT_SCLK_AUD_PCM 1 +#define AUD_MOUT_SCLK_AUD_I2S 2 +#define AUD_MOUT_AUD_PLL_USER 3 +#define AUD_DOUT_ACLK_AUD_131 4 +#define AUD_DOUT_SCLK_AUD_UART 5 +#define AUD_DOUT_SCLK_AUD_PCM 6 +#define AUD_DOUT_SCLK_AUD_I2S 7 +#define AUD_CLK_AUD_UART 8 +#define AUD_CLK_PCM 9 +#define AUD_CLK_I2S 10 +#define AUD_CLK_DMAC 11 +#define AUD_CLK_SRAMC 12 +#define AUD_SCLK_AUD_UART 13 +#define AUD_SCLK_PCM 14 +#define AUD_SCLK_I2S 15 +#define AUD_NR_CLK 16 + + +/* List Of Clocks For CMU_MFC */ + +#define MFC_MOUT_ACLK_MFC_333_USER 1 +#define MFC_DOUT_PCLK_MFC_83 2 +#define MFC_CLK_MFC 3 +#define MFC_CLK_SMMU2_MFCM1 4 +#define MFC_CLK_SMMU2_MFCM0 5 +#define MFC_NR_CLK 6 + + +/* List Of Clocks For CMU_GSCL */ + +#define GSCL_MOUT_ACLK_CSIS 1 +#define GSCL_MOUT_ACLK_GSCL_FIMC_USER 2 +#define GSCL_MOUT_ACLK_M2M_400_USER 3 +#define GSCL_MOUT_ACLK_GSCL_333_USER 4 +#define GSCL_DOUT_ACLK_CSIS_200 5 +#define GSCL_DOUT_PCLK_M2M_100 6 +#define GSCL_CLK_PIXEL_GSCL1 7 +#define GSCL_CLK_PIXEL_GSCL0 8 +#define GSCL_CLK_MSCL1 9 +#define GSCL_CLK_MSCL0 10 +#define GSCL_CLK_GSCL1 11 +#define GSCL_CLK_GSCL0 12 +#define GSCL_CLK_FIMC_LITE_D 13 +#define GSCL_CLK_FIMC_LITE_B 14 +#define GSCL_CLK_FIMC_LITE_A 15 +#define GSCL_CLK_CSIS1 16 +#define GSCL_CLK_CSIS0 17 +#define GSCL_CLK_SMMU3_LITE_D 18 +#define GSCL_CLK_SMMU3_LITE_B 19 +#define GSCL_CLK_SMMU3_LITE_A 20 +#define GSCL_CLK_SMMU3_GSCL0 21 +#define GSCL_CLK_SMMU3_GSCL1 22 +#define GSCL_CLK_SMMU3_MSCL0 23 +#define GSCL_CLK_SMMU3_MSCL1 24 +#define GSCL_SCLK_CSIS1_WRAP 25 +#define GSCL_SCLK_CSIS0_WRAP 26 +#define GSCL_NR_CLK 27 + + +/* List Of Clocks For CMU_FSYS */ + +#define FSYS_MOUT_PHYCLK_USBHOST20_PHYCLK_USER 1 +#define FSYS_MOUT_PHYCLK_USBHOST20_FREECLK_USER 2 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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