Date: Tue, 30 Dec 2025 14:55:05 +0000 From: Piotr Kubaj <pkubaj@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: 267707ac3063 - main - security/hashcat: fix build on powerpc64le Message-ID: <6953e7c9.47792.3cc2ae8e@gitrepo.freebsd.org>
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The branch main has been updated by pkubaj: URL: https://cgit.FreeBSD.org/ports/commit/?id=267707ac306356ddf59a52469620b4c6c60ecc5a commit 267707ac306356ddf59a52469620b4c6c60ecc5a Author: Piotr Kubaj <pkubaj@FreeBSD.org> AuthorDate: 2025-12-29 22:12:39 +0000 Commit: Piotr Kubaj <pkubaj@FreeBSD.org> CommitDate: 2025-12-30 14:54:55 +0000 security/hashcat: fix build on powerpc64le Backport just enough of https://github.com/hashcat/hashcat/commit/f57c822d63ac7885d903864f72fbf91c9d5b1af4 to support powerpc64le. --- ...patch-src_bridges_bridge__argon2id__reference.c | 16 +++++++++ security/hashcat/files/patch-src_cpu__features.c | 39 ++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/security/hashcat/files/patch-src_bridges_bridge__argon2id__reference.c b/security/hashcat/files/patch-src_bridges_bridge__argon2id__reference.c new file mode 100644 index 000000000000..54a0c3aa1d83 --- /dev/null +++ b/security/hashcat/files/patch-src_bridges_bridge__argon2id__reference.c @@ -0,0 +1,16 @@ +--- src/bridges/bridge_argon2id_reference.c.orig 2025-12-29 21:52:13 UTC ++++ src/bridges/bridge_argon2id_reference.c +@@ -18,10 +18,10 @@ + #include "core.c" + #include "blake2/blake2b.c" + +-#if defined(__riscv) +-#include "ref.c" +-#else ++#if defined (__x86_64__) || defined (_M_X64) || defined (__i386__) || defined (_M_IX86) || defined (__aarch64__) || defined (__arm64__) + #include "opt.c" ++#else ++#include "ref.c" + #endif + + // good: we can use this multiplier do reduce copy overhead to increase the guessing speed, diff --git a/security/hashcat/files/patch-src_cpu__features.c b/security/hashcat/files/patch-src_cpu__features.c new file mode 100644 index 000000000000..4a9b330d73da --- /dev/null +++ b/security/hashcat/files/patch-src_cpu__features.c @@ -0,0 +1,39 @@ +--- src/cpu_features.c.orig 2025-12-29 21:53:04 UTC ++++ src/cpu_features.c +@@ -16,17 +16,8 @@ int cpu_supports_avx512vl () { return 0; } + int cpu_supports_avx512f () { return 0; } + int cpu_supports_avx512vl () { return 0; } + +-#elif defined(__riscv) ++#elif defined (__x86_64__) || defined (_M_X64) || defined (__i386__) || defined (_M_IX86) + +-// TODO: Support RVV +-int cpu_supports_sse2 () { return 0; } +-int cpu_supports_ssse3 () { return 0; } +-int cpu_supports_xop () { return 0; } +-int cpu_supports_avx2 () { return 0; } +-int cpu_supports_avx512f () { return 0; } +-int cpu_supports_avx512vl () { return 0; } +- +-#else + static inline void cpuid (u32 leaf, u32 subleaf, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) + { + __cpuid_count (leaf, subleaf, *eax, *ebx, *ecx, *edx); +@@ -140,6 +131,17 @@ int cpu_supports_avx512vl () + + return (ebx & (1u << 31)) != 0; + } ++ ++#else ++ ++// TODO: Support SIMD acceleration on other architectures ++int cpu_supports_sse2 () { return 0; } ++int cpu_supports_ssse3 () { return 0; } ++int cpu_supports_xop () { return 0; } ++int cpu_supports_avx2 () { return 0; } ++int cpu_supports_avx512f () { return 0; } ++int cpu_supports_avx512vl () { return 0; } ++ + #endif + + int cpu_chipset_test ()home | help
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