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Date:      Fri, 25 Nov 2016 22:12:03 +0000 (UTC)
From:      John Baldwin <jhb@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org
Subject:   svn commit: r309168 - in stable: 10/sys/x86/x86 11/sys/x86/x86
Message-ID:  <201611252212.uAPMC3bV047024@repo.freebsd.org>

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Author: jhb
Date: Fri Nov 25 22:12:03 2016
New Revision: 309168
URL: https://svnweb.freebsd.org/changeset/base/309168

Log:
  MFC 307333: Reprogram I/O APIC interrupt pins when registering an I/O APIC.
  
  All I/O APIC pins are masked when an I/O APIC is first probed.  The
  APIC enumerator (MP Table or MADT) then parses its associated tables to
  configure individual pins to set custom delivery modes or alternate
  routing (e.g. routing IRQ 0 to intpin 2).  Pins for regular interrupt
  pins are left masked until the first interrupt is assigned.  However,
  pins with unusual settings (e.g. NMI or SMI) are never assigned an
  interrupt and thus never re-programmed.  The I/O APIC code used to
  reprogram all interrupt pins during registration but this was lost in
  r151979.
  
  In theory, this is mostly a no-op as the ACPI APIC table does not
  include a way to enumerate NMI or SMI pins for the I/O APIC, so only
  systems using an MP Table would be affected.

Modified:
  stable/10/sys/x86/x86/io_apic.c
Directory Properties:
  stable/10/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/11/sys/x86/x86/io_apic.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/10/sys/x86/x86/io_apic.c
==============================================================================
--- stable/10/sys/x86/x86/io_apic.c	Fri Nov 25 19:36:27 2016	(r309167)
+++ stable/10/sys/x86/x86/io_apic.c	Fri Nov 25 22:12:03 2016	(r309168)
@@ -804,11 +804,18 @@ ioapic_register(void *cookie)
 	    io->io_id, flags >> 4, flags & 0xf, io->io_intbase,
 	    io->io_intbase + io->io_numintr - 1);
 
-	/* Register valid pins as interrupt sources. */
+	/*
+	 * Reprogram pins to handle special case pins (such as NMI and
+	 * SMI) and register valid pins as interrupt sources.
+	 */
 	intr_register_pic(&io->io_pic);
-	for (i = 0, pin = io->io_pins; i < io->io_numintr; i++, pin++)
+	for (i = 0, pin = io->io_pins; i < io->io_numintr; i++, pin++) {
+		mtx_lock_spin(&icu_lock);
+		ioapic_program_intpin(pin);
+		mtx_unlock_spin(&icu_lock);
 		if (pin->io_irq < NUM_IO_INTS)
 			intr_register_source(&pin->io_intsrc);
+	}
 }
 
 /* A simple new-bus driver to consume PCI I/O APIC devices. */



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