Date: Sat, 27 Dec 2014 04:35:19 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r276285 - stable/10/sys/dev/ffec Message-ID: <201412270435.sBR4ZJvA040269@svn.freebsd.org>
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Author: ian Date: Sat Dec 27 04:35:18 2014 New Revision: 276285 URL: https://svnweb.freebsd.org/changeset/base/276285 Log: MFC r274967: Add busdma sync ops before reading and after modifying the descriptor rings Modified: stable/10/sys/dev/ffec/if_ffec.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/ffec/if_ffec.c ============================================================================== --- stable/10/sys/dev/ffec/if_ffec.c Sat Dec 27 04:33:35 2014 (r276284) +++ stable/10/sys/dev/ffec/if_ffec.c Sat Dec 27 04:35:18 2014 (r276285) @@ -653,7 +653,9 @@ ffec_txstart_locked(struct ffec_softc *s } if (enqueued != 0) { + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREWRITE); WR4(sc, FEC_TDAR_REG, FEC_TDAR_TDAR); + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTWRITE); sc->tx_watchdog_count = WATCHDOG_TIMEOUT_SECS; } } @@ -678,6 +680,9 @@ ffec_txfinish_locked(struct ffec_softc * FFEC_ASSERT_LOCKED(sc); + /* XXX Can't set PRE|POST right now, but we need both. */ + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREREAD); + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTREAD); ifp = sc->ifp; retired_buffer = false; while (sc->tx_idx_tail != sc->tx_idx_head) { @@ -842,6 +847,9 @@ ffec_rxfinish_locked(struct ffec_softc * FFEC_ASSERT_LOCKED(sc); + /* XXX Can't set PRE|POST right now, but we need both. */ + bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_PREREAD); + bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_POSTREAD); produced_empty_buffer = false; for (;;) { desc = &sc->rxdesc_ring[sc->rx_idx]; @@ -889,7 +897,9 @@ ffec_rxfinish_locked(struct ffec_softc * } if (produced_empty_buffer) { + bus_dmamap_sync(sc->rxdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREWRITE); WR4(sc, FEC_RDAR_REG, FEC_RDAR_RDAR); + bus_dmamap_sync(sc->rxdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTWRITE); } }
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