Date: Fri, 24 Jan 2003 18:31:47 -0800 (PST) From: Peter Wemm <peter@FreeBSD.org> To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/i386/i386 mpapic.c Message-ID: <200301250231.h0P2Vlmx087093@repoman.freebsd.org>
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peter 2003/01/24 18:31:47 PST
Modified files: (Branch: RELENG_4)
sys/i386/i386 mpapic.c
Log:
Partial fix for Compaq/hp DL/ML P4 Xeon systems, possibly others.
Only set the AP TPR registers to 0x10 during boot. If the BSP sets it
to 0x10, we dont see the RTC or 8254 timer interrupts for reasons that
are not fully understood yet.
Note that this doesn't completely fix the problem. The machines can
partially boot but will eventually lock up due to lost interrupts.
The only known solution for that is to either undefine GRAB_LOPRIO in
sys/i386/include/smptests.h (ouch, causes interrupt latency), or to apply
John Baldwin's hyperthread enable patches for 4.x. You might like to try
this: http://people.FreeBSD.org/~jhb/patches/htt.patch
You also want to set "machdep.cpu_idle_hlt=1" in /etc/sysctl.conf
Revision Changes Path
1.37.2.7 +3 -1 src/sys/i386/i386/mpapic.c
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