Date: Wed, 2 Jan 2002 21:35:52 -0800 (PST) From: Matthew Dillon <dillon@apollo.backplane.com> To: Peter Wemm <peter@wemm.org> Cc: John Baldwin <jhb@FreeBSD.ORG>, arch@FreeBSD.ORG, Bernd Walter <ticso@cicely8.cicely.de>, Mike Smith <msmith@FreeBSD.ORG>, Bruce Evans <bde@zeta.org.au>, Michal Mertl <mime@traveller.cz>, Peter Jeremy <peter.jeremy@alcatel.com.au> Subject: Re: When to use atomic_ functions? (was: 64 bit counters) Message-ID: <200201030535.g035Zq062246@apollo.backplane.com> References: <20020103045849.5B53039EC@overcee.netplex.com.au>
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:> Most of the critical section code in the system is going to be at
:> the top level. sti and cli *ARE* expensive, that's why the original
:> spl code went to such great lengths to avoid calling them. I
:> believe one or both instructions synchronizes the cpu pipeline,
:> interrupting instruction flow. It is nasty stuff.
:
:Not quite.. We went to extremes to avoid touching the ISA PIC, since that
:meant going over the 4.77Mhz (or 8Mhz) isa bus.. potentially taking many
:hundreds of cpu clock ticks per inb/outb. cli/sti is nothing compared to
:that. The spl code optimized the mask updates on the PIC, not cli/sti
:as such. The APIC is worse since it could take 40+ IO operations to set
:the complete mask, although thankfully at FSB speeds (not
:cpu core speed), not ISA speed.
:
:Cheers,
:-Peter
:--
:Peter Wemm - peter@FreeBSD.org; peter@yahoo-inc.com; peter@netplex.com.au
An ISA or PCI bus access is certainly expensive, but I don't see how
it applies to spl*() calls. The interrupt handler assembly has to
manipulate the controller no matter how spl*()'s are implemented
and that is where most of the optimizations were made (things like
AUTO_EOI and such). Since spl*() calls manipulate multiple interrupt
sources I don't think anyone would ever consider actually trying to
screw around with the PIC in spl*(), even if the PIC had been fast.
-Matt
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