Date: Sat, 21 Oct 2000 18:13:32 -0400 From: "Otter" <otterr@telocity.com> To: <kstewart@urx.com>, "Joseph E. Royce" <joe@freyr.cba.ualr.edu> Cc: <freebsd-questions@FreeBSD.ORG> Subject: RE: FW: booting problems with SMP enabled Message-ID: <HLEDJBJKDDPDJBMGCLPPGEGDCGAA.otterr@telocity.com> In-Reply-To: <39F099CB.BC701C70@urx.com>
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Thanks to all for the identification tips. I was not able to get any FCC id (though I did bookamrk the site!). Tracking down the BIOS ID # led me to Soyo. I wasn't able to ID it as anything they've made (or at least show on their web site) I did send them an email requesting info since the only thing I could ID was the manufacturer from the BIOS ID. None of the rest of the BIOS ID would translate to anything Amibios had listed. Thanks again. At least if they reply I might be able to get somewhere with this board. Until then, FreeBSD will continue to only see use processor, at least until I can get around this "testing interrupt" step. -Otter }-----Original Message----- }From: owner-freebsd-questions@FreeBSD.ORG }[mailto:owner-freebsd-questions@FreeBSD.ORG]On Behalf Of Kent Stewart }Sent: Friday, October 20, 2000 3:15 PM }To: Joseph E. Royce }Cc: Otter; freebsd-questions@FreeBSD.ORG }Subject: Re: FW: booting problems with SMP enabled } } } } }"Joseph E. Royce" wrote: }> }> On Fri, Oct 20, 2000 at 06:57:18AM -0400, Otter wrote: }> > }> > }> > }-----Original Message----- }> > }From: owner-freebsd-questions@FreeBSD.ORG }> > }[mailto:owner-freebsd-questions@FreeBSD.ORG]On Behalf }Of Mike Meyer }> > }Sent: Thursday, October 19, 2000 11:05 PM }> > }To: Otter }> > }Cc: questions@FreeBSD.ORG }> > }Subject: Re: FW: booting problems with SMP enabled }> > } }> > } }> > }Otter writes: }> > }> I've got a new install of 4.1-RELEASE here. }> > }> Hardware consists of a dual processor board (unknown brand), }> > }> 2 Intel P2-300's, a single 128MB DIMM, onboard scsi }> > }> (disabled), on a 13GB IDE drive. The machine boots and runs }> > }> fine with a single processor. For testing purposes, I've }> > }> swapped them around to make sure that both CPU's are working }> > }> as they should. No problems there. When I boot up with the }> > }> SMP kernel (only the SMP and APIC_IO lines uncommented) it }> > }> hangs in the boot process at where it says "APIC_IO: testing }> > }> 8254 interrupt delivery". At this point, the machine locks }> > }> and requires me cycling power via the switch on the power }> > }> supply. I'm at a loss. I've got a bank of dipdswitches on }> > }> the board and have changed a few at random, but no luck so }> > }> far. Without knowing the brand of the board, I'm not sure }> > }> how I can take this any further. Any }tips/ideas/suggestions? TIA. }> > } }> > }Check the board manufacturers web site for a manual! }> > } }> > I'd love to, but as you can see above, I don't know who the }> > manufacturer is/was. I've found no markings on the board }that identify }> > it as any particular brand. }> }> If you can find a FCC ID number on the motherboard then you can do }> a search at http://www.fcc.govoet/fccid/ for the manufacturers. } }This wasn't copied right. I thought it was an important resource and }it was missing. I found it had a "/" missing. The address is }http://www.fcc.gov/oet/fccid/ } }Kent } }> }> -Joe }> > }> > }Also notice that "An SMP kernel will ONLY run on an Intel MP }> > }spec. qualified motherboard" and "Be sure to disable 'cpu }> > }I386_CPU' && }> > }'cpu I486_CPU' for SMP kernels." (The latter may not be }required for }> > }your version, but won't hurt in any case). }> > }> > already done. }> > }> > } }> > }Also, check the stepping number of the P2's (on the }chip, somewhere, }> > }one hopes, or possibly in dmesg when the system boots) }and then check }> > }the intel web to make sure the two chips will work }*together*. While }> > }each may work fine, if you've don't have compatible }stepping numbers, }> > }they won't work together. }> > } }> > } <mike }> > } }> > The stepping numbers DO match. I've searched Intel's }site and found }> > some CPUID info charts, but nothing that states they }work together... }> > then again, I didn't find anything saying the contrary. I seem to }> > remember that was the big hype of P2 over Celerons-- }they had more }> > cache and would support SMP. I could only assume that }they all do... }> > and neer had problems getting any p2 or p3's to work in }SMP as long as }> > the stepping numbers matched. I've set this up on }several machines in }> > the past, so I know (or at least I used to!) what to }look for and the }> > steps to take to make it happen. I'm just at a loss on this one. }> > -Otter }> > }> > }> > }> > To Unsubscribe: send mail to majordomo@FreeBSD.org }> > with "unsubscribe freebsd-questions" in the body of the message }> }> To Unsubscribe: send mail to majordomo@FreeBSD.org }> with "unsubscribe freebsd-questions" in the body of the message } }-- }Kent Stewart }Richland, WA } }mailto:kbstew99@hotmail.com }http://kstewart.urx.com/kstewart/index.html }FreeBSD News http://daily.daemonnews.org/ } } }To Unsubscribe: send mail to majordomo@FreeBSD.org }with "unsubscribe freebsd-questions" in the body of the message To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
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