Date: Sun, 8 Jul 2018 18:44:42 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r336094 - head/sys/arm/freescale/imx Message-ID: <201807081844.w68IigHp033478@repo.freebsd.org>
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Author: ian Date: Sun Jul 8 18:44:42 2018 New Revision: 336094 URL: https://svnweb.freebsd.org/changeset/base/336094 Log: Catch up with improvements in RTC handling... It's no longer necessary to ignore the timestamp passed in to settime() due to inaccuracy, the core routines now pass in a nanosecond-accurate time freshly-obtained before calling each driver's settime() method. Also, add calls to the new debugging output helpers. Modified: head/sys/arm/freescale/imx/imx6_snvs.c Modified: head/sys/arm/freescale/imx/imx6_snvs.c ============================================================================== --- head/sys/arm/freescale/imx/imx6_snvs.c Sun Jul 8 18:15:55 2018 (r336093) +++ head/sys/arm/freescale/imx/imx6_snvs.c Sun Jul 8 18:44:42 2018 (r336094) @@ -137,35 +137,33 @@ snvs_gettime(device_t dev, struct timespec *ts) *ts = sbttots(counter1); + clock_dbgprint_ts(sc->dev, CLOCK_DBG_READ, ts); + return (0); } static int -snvs_settime(device_t dev, struct timespec *unused) +snvs_settime(device_t dev, struct timespec *ts) { struct snvs_softc *sc; - struct bintime bt; sbintime_t sbt; sc = device_get_softc(dev); /* - * Ignore the inaccurate time passed in from the common clock code and - * obtain a time worthy of our 30us accuracy. + * The hardware format is the same as sbt (with fewer fractional bits), + * so first convert the time to sbt. It takes two clock cycles for the + * counter to start after setting the enable bit, so add two SBT_LSBs to + * what we're about to set. */ - bintime(&bt); - bt.sec -= utc_offset(); - sbt = bttosbt(bt); - - /* - * It takes two clock cycles for the counter to start after setting the - * enable bit, so add two SBT_LSBs to what we're about to set. - */ + sbt = tstosbt(*ts); sbt += 2 << SBT_LSB; snvs_rtc_enable(sc, false); WR4(sc, SNVS_LPSRTCMR, (uint32_t)(sbt >> (SBT_LSB + 32))); WR4(sc, SNVS_LPSRTCLR, (uint32_t)(sbt >> (SBT_LSB))); snvs_rtc_enable(sc, true); + + clock_dbgprint_ts(sc->dev, CLOCK_DBG_WRITE, ts); return (0); }
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