Date: Sat, 10 Apr 2010 11:13:51 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r206450 - head/sys/sparc64/include Message-ID: <201004101113.o3ABDpeo062701@svn.freebsd.org>
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Author: marius Date: Sat Apr 10 11:13:51 2010 New Revision: 206450 URL: http://svn.freebsd.org/changeset/base/206450 Log: Correct the DCR_IPE macro to refer to the right bit. Also improve the associated comment as besides US-IV+ these bits are only available with US-III++, i.e. the 1.2GHz version of the US-III+. Modified: head/sys/sparc64/include/dcr.h Modified: head/sys/sparc64/include/dcr.h ============================================================================== --- head/sys/sparc64/include/dcr.h Sat Apr 10 10:56:59 2010 (r206449) +++ head/sys/sparc64/include/dcr.h Sat Apr 10 11:13:51 2010 (r206450) @@ -43,8 +43,8 @@ #define DCR_OBSDATA_CT_MASK \ (((1UL << DCR_OBSDATA_CT_BITS) - 1) << DCR_OBSDATA_SHIFT) -/* The following bits are valid for the UltraSPARC-III+/IV+ only. */ -#define DCR_IPE (1UL << 5) +/* The following bits are valid for the UltraSPARC-III++/IV+ only. */ +#define DCR_IPE (1UL << 2) #define DCR_OBSDATA_CTP_BITS 6 #define DCR_OBSDATA_CTP_MASK \
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