Skip site navigation (1)Skip section navigation (2)
Date:      Thu, 19 Sep 1996 03:26:10 +0200 (MET DST)
From:      Michael Beckmann <petzi@zit.th-darmstadt.de>
To:        "Rodney W. Grimes" <rgrimes@GndRsh.aac.dev.com>
Cc:        spork@super-g.com, isp@freebsd.org, hardware@freebsd.org
Subject:   Re: INN history file and disk I/O
Message-ID:  <Pine.NEB.3.94.960919030503.4355A-100000@zit1.zit.th-darmstadt.de>
In-Reply-To: <199609182104.OAA04861@GndRsh.aac.dev.com>

next in thread | previous in thread | raw e-mail | index | archive | help
Hi,

> Buyer beware, Gigabyte is playing games with the specifications and
> register usage of the Triton-I and Triton-II chipsets to get away with
> these 6 SIMM slots.  These chip sets have 8 programmable DRAM row size
> registers, each _SIDE_ of a SIMM requires one of them to be programmed,
> you can _ONLY_ run 4 double sided simms with these chip sets.

According to the HX manual you can use 6 SIMMs with 8 MB each in it, and
these are double-sided.
OTOH, who cares whether one can put 6 double sided SIMMs in it. There are
so many valid combinations that I don't see this as a problem. The 586 ATE
and HX mainboards I have used work just fine, I haven't seen one fail yet.
That's just my personal experience. I'm not religious about mainboards,
but I don't have the impression that Asus boards have significantly fewer
bugs and problems. Gigabyte definitely belongs to the good equipment.

> Gigabyte dirty little move is to _ONLY_ allow single sided SIMMS in 2

Wow, you make it sound as if Gigabyte were posessed by the wicked one ;-)

Cheers,

Michael




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?Pine.NEB.3.94.960919030503.4355A-100000>