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Date:      Sat, 10 Jun 2017 13:44:07 +0000 (UTC)
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org
Subject:   svn commit: r319780 - in vendor/llvm/dist: . bindings/go/llvm bindings/ocaml/llvm cmake/modules docs examples/ExceptionDemo include/llvm include/llvm-c include/llvm/ADT include/llvm/Analysis includ...
Message-ID:  <201706101344.v5ADi7VN094594@repo.freebsd.org>

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---

Author: dim
Date: Sat Jun 10 13:44:06 2017
New Revision: 319780
URL: https://svnweb.freebsd.org/changeset/base/319780

Log:
  Vendor import of llvm trunk r305145:
  https://llvm.org/svn/llvm-project/llvm/trunk@305145

Added:
  vendor/llvm/dist/include/llvm/BinaryFormat/
  vendor/llvm/dist/include/llvm/BinaryFormat/COFF.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/Dwarf.def
  vendor/llvm/dist/include/llvm/BinaryFormat/Dwarf.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/ELF.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/ARM.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/AVR.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/BPF.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/Hexagon.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/Lanai.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/Mips.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/PowerPC.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/Sparc.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/SystemZ.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/WebAssembly.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/i386.def
  vendor/llvm/dist/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
  vendor/llvm/dist/include/llvm/BinaryFormat/MachO.def
  vendor/llvm/dist/include/llvm/BinaryFormat/MachO.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/Magic.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/Wasm.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/BinaryFormat/WasmRelocs/
  vendor/llvm/dist/include/llvm/BinaryFormat/WasmRelocs/WebAssembly.def
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugCrossExSubsection.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugCrossImpSubsection.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugSymbolRVASubsection.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/Support/AMDGPUCodeObjectMetadata.h   (contents, props changed)
  vendor/llvm/dist/include/llvm/Transforms/Utils/OrderedInstructions.h   (contents, props changed)
  vendor/llvm/dist/lib/BinaryFormat/
  vendor/llvm/dist/lib/BinaryFormat/CMakeLists.txt   (contents, props changed)
  vendor/llvm/dist/lib/BinaryFormat/Dwarf.cpp   (contents, props changed)
  vendor/llvm/dist/lib/BinaryFormat/LLVMBuild.txt   (contents, props changed)
  vendor/llvm/dist/lib/BinaryFormat/Magic.cpp   (contents, props changed)
  vendor/llvm/dist/lib/DebugInfo/CodeView/DebugCrossExSubsection.cpp   (contents, props changed)
  vendor/llvm/dist/lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp   (contents, props changed)
  vendor/llvm/dist/lib/DebugInfo/CodeView/DebugSymbolRVASubsection.cpp   (contents, props changed)
  vendor/llvm/dist/lib/Support/AMDGPUCodeObjectMetadata.cpp   (contents, props changed)
  vendor/llvm/dist/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp   (contents, props changed)
  vendor/llvm/dist/lib/Transforms/Utils/OrderedInstructions.cpp   (contents, props changed)
  vendor/llvm/dist/test/Analysis/BranchProbabilityInfo/libfunc_call.ll
  vendor/llvm/dist/test/BugPoint/unsymbolized.ll
  vendor/llvm/dist/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
  vendor/llvm/dist/test/CodeGen/AArch64/spill-undef.mir
  vendor/llvm/dist/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
  vendor/llvm/dist/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
  vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.alignb.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/rename-independent-subregs-invalid-mac-operands.mir
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-instruction-select-combos.mir
  vendor/llvm/dist/test/CodeGen/ARM/clang-section.ll
  vendor/llvm/dist/test/CodeGen/Hexagon/common-gep-inbounds.ll
  vendor/llvm/dist/test/CodeGen/Hexagon/mux-undef.ll
  vendor/llvm/dist/test/CodeGen/MIR/X86/empty0.mir
  vendor/llvm/dist/test/CodeGen/MIR/X86/empty1.mir
  vendor/llvm/dist/test/CodeGen/MIR/X86/empty2.mir
  vendor/llvm/dist/test/CodeGen/MIR/X86/inline-asm.mir
  vendor/llvm/dist/test/CodeGen/MIR/X86/roundtrip.mir
  vendor/llvm/dist/test/CodeGen/Mips/cconv/vector.ll
  vendor/llvm/dist/test/CodeGen/Mips/pbqp-reserved-physreg.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/BoolRetToIntTest-2.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesinesc.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesinesi.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesinesll.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesiness.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesineuc.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesineui.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesineull.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesineus.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllnesll.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllneull.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/vec_int_ext.ll
  vendor/llvm/dist/test/CodeGen/X86/mul-constant-result.ll
  vendor/llvm/dist/test/CodeGen/X86/pr32659.ll
  vendor/llvm/dist/test/CodeGen/X86/selectiondag-dominator.ll
  vendor/llvm/dist/test/CodeGen/X86/vector-shuffle-v48.ll
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-dwp.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-1.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-1.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-2.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-2.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-3.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-3.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-4.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-4.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-5.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-5.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets.s   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/Inputs/dwarfdump-str-offsets.x86_64.o   (contents, props changed)
  vendor/llvm/dist/test/DebugInfo/PDB/Inputs/debug-subsections.yaml
  vendor/llvm/dist/test/DebugInfo/PDB/pdbdump-debug-subsections.test
  vendor/llvm/dist/test/DebugInfo/dwarfdump-str-offsets-invalid.test
  vendor/llvm/dist/test/DebugInfo/dwarfdump-str-offsets.test
  vendor/llvm/dist/test/LTO/ARM/Inputs/
  vendor/llvm/dist/test/LTO/ARM/Inputs/thumb.ll
  vendor/llvm/dist/test/LTO/ARM/link-arm-and-thumb.ll
  vendor/llvm/dist/test/LTO/Resolution/X86/linker-redef.ll
  vendor/llvm/dist/test/Linker/Inputs/thumb.ll
  vendor/llvm/dist/test/Linker/link-arm-and-thumb.ll
  vendor/llvm/dist/test/MC/ARM/arm-thumb-tail-call.ll
  vendor/llvm/dist/test/MC/ARM/t2-modified-immediate-fixup-error1.s   (contents, props changed)
  vendor/llvm/dist/test/MC/ARM/t2-modified-immediate-fixup-error2.s   (contents, props changed)
  vendor/llvm/dist/test/MC/ARM/t2-modified-immediate-fixup.s   (contents, props changed)
  vendor/llvm/dist/test/MC/AsmParser/empty-comment.s   (contents, props changed)
  vendor/llvm/dist/test/MC/ELF/ARM/clang-section.s   (contents, props changed)
  vendor/llvm/dist/test/MC/MachO/alias.s   (contents, props changed)
  vendor/llvm/dist/test/Object/objc-imageinfo-coff.ll
  vendor/llvm/dist/test/Object/objc-imageinfo-elf.ll
  vendor/llvm/dist/test/Object/objc-imageinfo-macho.ll
  vendor/llvm/dist/test/Transforms/CodeGenPrepare/X86/memcmp.ll
  vendor/llvm/dist/test/Transforms/IRCE/correct-loop-info.ll
  vendor/llvm/dist/test/Transforms/IndVarSimplify/lftr_disabled.ll
  vendor/llvm/dist/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
  vendor/llvm/dist/test/Transforms/InstCombine/constant-fold-libfunc.ll
  vendor/llvm/dist/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
  vendor/llvm/dist/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
  vendor/llvm/dist/test/Transforms/LoopIdiom/unordered-atomic-memcpy-noarch.ll
  vendor/llvm/dist/test/Transforms/LowerExpectIntrinsic/PR33346.ll
  vendor/llvm/dist/test/Transforms/LowerTypeTests/simplify.ll
  vendor/llvm/dist/test/Transforms/NewGVN/pr33187.ll
  vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/reverse_extract_elements.ll
  vendor/llvm/dist/test/Transforms/Sink/badloadsink.ll
  vendor/llvm/dist/test/tools/llvm-cvtres/Inputs/test_resource.obj.coff   (contents, props changed)
  vendor/llvm/dist/test/tools/llvm-cvtres/object.test
  vendor/llvm/dist/test/tools/llvm-cvtres/parse.test
  vendor/llvm/dist/test/tools/llvm-dwarfdump/X86/
  vendor/llvm/dist/test/tools/llvm-dwarfdump/X86/brief.s   (contents, props changed)
  vendor/llvm/dist/test/tools/llvm-dwarfdump/X86/lit.local.cfg
  vendor/llvm/dist/test/tools/llvm-readobj/Inputs/trivial.obj.elf-amdhsa-gfx803   (contents, props changed)
  vendor/llvm/dist/test/tools/llvm-readobj/amdgpu-elf-definitions.test
  vendor/llvm/dist/tools/llvm-pdbutil/
  vendor/llvm/dist/tools/llvm-pdbutil/Analyze.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/Analyze.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/CMakeLists.txt   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/CompactTypeDumpVisitor.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/CompactTypeDumpVisitor.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/Diff.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/Diff.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/LLVMBuild.txt   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/LLVMOutputStyle.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/LLVMOutputStyle.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/LinePrinter.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/LinePrinter.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/OutputStyle.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PdbYaml.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PdbYaml.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyBuiltinDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyBuiltinDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyClassDefinitionDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyClassDefinitionDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyClassLayoutGraphicalDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyClassLayoutGraphicalDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyCompilandDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyCompilandDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyEnumDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyEnumDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyExternalSymbolDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyExternalSymbolDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyFunctionDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyFunctionDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyTypeDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyTypeDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyTypedefDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyTypedefDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyVariableDumper.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/PrettyVariableDumper.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/StreamUtil.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/StreamUtil.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/YAMLOutputStyle.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/YAMLOutputStyle.h   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/fuzzer/
  vendor/llvm/dist/tools/llvm-pdbutil/fuzzer/CMakeLists.txt   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/fuzzer/llvm-pdbutil-fuzzer.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/llvm-pdbutil.cpp   (contents, props changed)
  vendor/llvm/dist/tools/llvm-pdbutil/llvm-pdbutil.h   (contents, props changed)
  vendor/llvm/dist/unittests/Analysis/GlobalsModRefTest.cpp   (contents, props changed)
  vendor/llvm/dist/unittests/BinaryFormat/
  vendor/llvm/dist/unittests/BinaryFormat/CMakeLists.txt   (contents, props changed)
  vendor/llvm/dist/unittests/BinaryFormat/DwarfTest.cpp   (contents, props changed)
  vendor/llvm/dist/unittests/BinaryFormat/TestFileMagic.cpp   (contents, props changed)
  vendor/llvm/dist/unittests/Transforms/Utils/OrderedInstructions.cpp   (contents, props changed)
Deleted:
  vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionInitializer.h
  vendor/llvm/dist/include/llvm/Support/COFF.h
  vendor/llvm/dist/include/llvm/Support/Dwarf.def
  vendor/llvm/dist/include/llvm/Support/Dwarf.h
  vendor/llvm/dist/include/llvm/Support/ELF.h
  vendor/llvm/dist/include/llvm/Support/ELFRelocs/
  vendor/llvm/dist/include/llvm/Support/MachO.def
  vendor/llvm/dist/include/llvm/Support/MachO.h
  vendor/llvm/dist/include/llvm/Support/Wasm.h
  vendor/llvm/dist/include/llvm/Support/WasmRelocs/
  vendor/llvm/dist/lib/Support/Dwarf.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadata.h
  vendor/llvm/dist/test/CodeGen/MIR/Generic/function-missing-machine-function.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/irtranslator-call.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/irtranslator-callingconv_64bit.ll
  vendor/llvm/dist/test/DebugInfo/PDB/Inputs/simple-line-info.yaml
  vendor/llvm/dist/test/DebugInfo/PDB/pdbdump-yaml-lineinfo-write.test
  vendor/llvm/dist/test/DebugInfo/PDB/pdbdump-yaml-lineinfo.test
  vendor/llvm/dist/test/tools/llvm-cvtres/resource.test
  vendor/llvm/dist/test/tools/llvm-readobj/Inputs/trivial.elf-amdhsa-kaveri
  vendor/llvm/dist/test/tools/llvm-readobj/amdgpu-elf-defs.test
  vendor/llvm/dist/tools/llvm-pdbdump/
  vendor/llvm/dist/unittests/Support/DwarfTest.cpp
  vendor/llvm/dist/utils/TableGen/X86FoldTablesEmitter.cpp
Modified:
  vendor/llvm/dist/CMakeLists.txt
  vendor/llvm/dist/bindings/go/llvm/ir.go
  vendor/llvm/dist/bindings/go/llvm/ir_test.go
  vendor/llvm/dist/bindings/ocaml/llvm/llvm.ml
  vendor/llvm/dist/bindings/ocaml/llvm/llvm.mli
  vendor/llvm/dist/bindings/ocaml/llvm/llvm_ocaml.c
  vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake
  vendor/llvm/dist/cmake/modules/TableGen.cmake
  vendor/llvm/dist/docs/AMDGPUUsage.rst
  vendor/llvm/dist/docs/CodeGenerator.rst
  vendor/llvm/dist/docs/CompilerWriterInfo.rst
  vendor/llvm/dist/docs/LangRef.rst
  vendor/llvm/dist/docs/ReleaseNotes.rst
  vendor/llvm/dist/docs/index.rst
  vendor/llvm/dist/examples/ExceptionDemo/ExceptionDemo.cpp
  vendor/llvm/dist/include/llvm-c/Core.h
  vendor/llvm/dist/include/llvm-c/ExecutionEngine.h
  vendor/llvm/dist/include/llvm-c/Support.h
  vendor/llvm/dist/include/llvm-c/TargetMachine.h
  vendor/llvm/dist/include/llvm/ADT/APInt.h
  vendor/llvm/dist/include/llvm/ADT/GraphTraits.h
  vendor/llvm/dist/include/llvm/ADT/ImmutableSet.h
  vendor/llvm/dist/include/llvm/ADT/PointerUnion.h
  vendor/llvm/dist/include/llvm/ADT/PostOrderIterator.h
  vendor/llvm/dist/include/llvm/ADT/PriorityWorklist.h
  vendor/llvm/dist/include/llvm/ADT/SCCIterator.h
  vendor/llvm/dist/include/llvm/ADT/SmallPtrSet.h
  vendor/llvm/dist/include/llvm/ADT/SmallVector.h
  vendor/llvm/dist/include/llvm/ADT/SparseMultiSet.h
  vendor/llvm/dist/include/llvm/ADT/StringExtras.h
  vendor/llvm/dist/include/llvm/ADT/StringRef.h
  vendor/llvm/dist/include/llvm/ADT/iterator_range.h
  vendor/llvm/dist/include/llvm/Analysis/AliasAnalysis.h
  vendor/llvm/dist/include/llvm/Analysis/AssumptionCache.h
  vendor/llvm/dist/include/llvm/Analysis/BranchProbabilityInfo.h
  vendor/llvm/dist/include/llvm/Analysis/ConstantFolding.h
  vendor/llvm/dist/include/llvm/Analysis/DemandedBits.h
  vendor/llvm/dist/include/llvm/Analysis/InlineCost.h
  vendor/llvm/dist/include/llvm/Analysis/InstructionSimplify.h
  vendor/llvm/dist/include/llvm/Analysis/LazyBranchProbabilityInfo.h
  vendor/llvm/dist/include/llvm/Analysis/LazyValueInfo.h
  vendor/llvm/dist/include/llvm/Analysis/LoopInfoImpl.h
  vendor/llvm/dist/include/llvm/Analysis/MemoryDependenceAnalysis.h
  vendor/llvm/dist/include/llvm/Analysis/MemorySSAUpdater.h
  vendor/llvm/dist/include/llvm/Analysis/ObjCARCAnalysisUtils.h
  vendor/llvm/dist/include/llvm/Analysis/ObjCARCInstKind.h
  vendor/llvm/dist/include/llvm/Analysis/ScalarEvolutionNormalization.h
  vendor/llvm/dist/include/llvm/Analysis/TargetLibraryInfo.h
  vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h
  vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h
  vendor/llvm/dist/include/llvm/Bitcode/BitcodeReader.h
  vendor/llvm/dist/include/llvm/Bitcode/LLVMBitCodes.h
  vendor/llvm/dist/include/llvm/CodeGen/BasicTTIImpl.h
  vendor/llvm/dist/include/llvm/CodeGen/DFAPacketizer.h
  vendor/llvm/dist/include/llvm/CodeGen/DIE.h
  vendor/llvm/dist/include/llvm/CodeGen/ExecutionDepsFix.h
  vendor/llvm/dist/include/llvm/CodeGen/FastISel.h
  vendor/llvm/dist/include/llvm/CodeGen/FunctionLoweringInfo.h
  vendor/llvm/dist/include/llvm/CodeGen/GCMetadata.h
  vendor/llvm/dist/include/llvm/CodeGen/GCMetadataPrinter.h
  vendor/llvm/dist/include/llvm/CodeGen/GCStrategy.h
  vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
  vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  vendor/llvm/dist/include/llvm/CodeGen/LexicalScopes.h
  vendor/llvm/dist/include/llvm/CodeGen/LiveInterval.h
  vendor/llvm/dist/include/llvm/CodeGen/LiveRegUnits.h
  vendor/llvm/dist/include/llvm/CodeGen/MIRParser/MIRParser.h
  vendor/llvm/dist/include/llvm/CodeGen/MIRYamlMapping.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineBasicBlock.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionPass.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineMemOperand.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfoImpls.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineOperand.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineRegisterInfo.h
  vendor/llvm/dist/include/llvm/CodeGen/RegAllocRegistry.h
  vendor/llvm/dist/include/llvm/CodeGen/RegisterPressure.h
  vendor/llvm/dist/include/llvm/CodeGen/RegisterUsageInfo.h
  vendor/llvm/dist/include/llvm/CodeGen/ScheduleDAG.h
  vendor/llvm/dist/include/llvm/CodeGen/ScheduleDAGInstrs.h
  vendor/llvm/dist/include/llvm/CodeGen/ScheduleDFS.h
  vendor/llvm/dist/include/llvm/CodeGen/SchedulerRegistry.h
  vendor/llvm/dist/include/llvm/CodeGen/SelectionDAG.h
  vendor/llvm/dist/include/llvm/CodeGen/SelectionDAGNodes.h
  vendor/llvm/dist/include/llvm/CodeGen/SlotIndexes.h
  vendor/llvm/dist/include/llvm/CodeGen/StackProtector.h
  vendor/llvm/dist/include/llvm/CodeGen/TailDuplicator.h
  vendor/llvm/dist/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
  vendor/llvm/dist/include/llvm/CodeGen/TargetPassConfig.h
  vendor/llvm/dist/include/llvm/CodeGen/TargetSchedule.h
  vendor/llvm/dist/include/llvm/CodeGen/VirtRegMap.h
  vendor/llvm/dist/include/llvm/Config/abi-breaking.h.cmake
  vendor/llvm/dist/include/llvm/Config/config.h.cmake
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CVRecord.h
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CodeView.h
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugChecksumsSubsection.h
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugInlineeLinesSubsection.h
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugLinesSubsection.h
  vendor/llvm/dist/include/llvm/DebugInfo/CodeView/DebugStringTableSubsection.h
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  vendor/llvm/dist/unittests/Support/DynamicLibrary/PipSqueak.cxx
  vendor/llvm/dist/unittests/Support/DynamicLibrary/PipSqueak.h
  vendor/llvm/dist/unittests/Support/EndianStreamTest.cpp
  vendor/llvm/dist/unittests/Support/FileOutputBufferTest.cpp
  vendor/llvm/dist/unittests/Support/FormatVariadicTest.cpp
  vendor/llvm/dist/unittests/Support/LEB128Test.cpp
  vendor/llvm/dist/unittests/Support/MD5Test.cpp
  vendor/llvm/dist/unittests/Support/MathExtrasTest.cpp
  vendor/llvm/dist/unittests/Support/MemoryBufferTest.cpp
  vendor/llvm/dist/unittests/Support/MemoryTest.cpp
  vendor/llvm/dist/unittests/Support/Path.cpp
  vendor/llvm/dist/unittests/Support/ProgramTest.cpp
  vendor/llvm/dist/unittests/Support/SpecialCaseListTest.cpp
  vendor/llvm/dist/unittests/Support/SwapByteOrderTest.cpp
  vendor/llvm/dist/unittests/Support/TarWriterTest.cpp
  vendor/llvm/dist/unittests/Support/TargetParserTest.cpp
  vendor/llvm/dist/unittests/Support/TrigramIndexTest.cpp
  vendor/llvm/dist/unittests/Support/YAMLIOTest.cpp
  vendor/llvm/dist/unittests/Support/YAMLParserTest.cpp
  vendor/llvm/dist/unittests/Support/formatted_raw_ostream_test.cpp
  vendor/llvm/dist/unittests/Support/raw_ostream_test.cpp
  vendor/llvm/dist/unittests/Support/raw_pwrite_stream_test.cpp
  vendor/llvm/dist/unittests/Support/raw_sha1_ostream_test.cpp
  vendor/llvm/dist/unittests/Target/AArch64/InstSizes.cpp
  vendor/llvm/dist/unittests/Transforms/Scalar/LoopPassManagerTest.cpp
  vendor/llvm/dist/unittests/Transforms/Utils/CMakeLists.txt
  vendor/llvm/dist/unittests/Transforms/Utils/FunctionComparator.cpp
  vendor/llvm/dist/unittests/Transforms/Utils/ValueMapperTest.cpp
  vendor/llvm/dist/utils/FileCheck/FileCheck.cpp
  vendor/llvm/dist/utils/TableGen/CMakeLists.txt
  vendor/llvm/dist/utils/TableGen/TableGen.cpp
  vendor/llvm/dist/utils/TableGen/TableGenBackends.h
  vendor/llvm/dist/utils/gdb-scripts/prettyprinters.py
  vendor/llvm/dist/utils/git-svn/git-llvm
  vendor/llvm/dist/utils/opt-viewer/optrecord.py
  vendor/llvm/dist/utils/release/test-release.sh

Modified: vendor/llvm/dist/CMakeLists.txt
==============================================================================
--- vendor/llvm/dist/CMakeLists.txt	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/CMakeLists.txt	Sat Jun 10 13:44:06 2017	(r319780)
@@ -385,6 +385,7 @@ else()
   option(LLVM_ENABLE_LOCAL_SUBMODULE_VISIBILITY "Compile with -fmodules-local-submodule-visibility." ON)
 endif()
 option(LLVM_ENABLE_CXX1Y "Compile with C++1y enabled." OFF)
+option(LLVM_ENABLE_CXX1Z "Compile with C++1z enabled." OFF)
 option(LLVM_ENABLE_LIBCXX "Use libc++ if available." OFF)
 option(LLVM_ENABLE_LLD "Use lld as C and C++ linker." OFF)
 option(LLVM_ENABLE_PEDANTIC "Compile with pedantic enabled." ON)
@@ -853,7 +854,6 @@ if( LLVM_INCLUDE_UTILS )
   add_subdirectory(utils/not)
   add_subdirectory(utils/llvm-lit)
   add_subdirectory(utils/yaml-bench)
-  add_subdirectory(utils/unittest)
 else()
   if ( LLVM_INCLUDE_TESTS )
     message(FATAL_ERROR "Including tests when not building utils will not work.
@@ -897,6 +897,10 @@ if( LLVM_INCLUDE_TESTS )
   endif()
   add_subdirectory(test)
   add_subdirectory(unittests)
+  if( LLVM_INCLUDE_UTILS )
+    add_subdirectory(utils/unittest)
+  endif()
+
   if (WIN32)
     # This utility is used to prevent crashing tests from calling Dr. Watson on
     # Windows.

Modified: vendor/llvm/dist/bindings/go/llvm/ir.go
==============================================================================
--- vendor/llvm/dist/bindings/go/llvm/ir.go	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/bindings/go/llvm/ir.go	Sat Jun 10 13:44:06 2017	(r319780)
@@ -611,6 +611,12 @@ func (t Type) StructElementTypes() []Type {
 }
 
 // Operations on array, pointer, and vector types (sequence types)
+func (t Type) Subtypes() (ret []Type) {
+	ret = make([]Type, C.LLVMGetNumContainedTypes(t.C))
+	C.LLVMGetSubtypes(t.C, llvmTypeRefPtr(&ret[0]))
+	return
+}
+
 func ArrayType(elementType Type, elementCount int) (t Type) {
 	t.C = C.LLVMArrayType(elementType.C, C.unsigned(elementCount))
 	return

Modified: vendor/llvm/dist/bindings/go/llvm/ir_test.go
==============================================================================
--- vendor/llvm/dist/bindings/go/llvm/ir_test.go	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/bindings/go/llvm/ir_test.go	Sat Jun 10 13:44:06 2017	(r319780)
@@ -134,3 +134,29 @@ func TestDebugLoc(t *testing.T) {
 		t.Errorf("Got metadata %v as scope, though wanted %v", loc.Scope.C, scope.C)
 	}
 }
+
+func TestSubtypes(t *testing.T) {
+	cont := NewContext()
+	defer cont.Dispose()
+
+	int_pointer := PointerType(cont.Int32Type(), 0)
+	int_inner := int_pointer.Subtypes()
+	if len(int_inner) != 1 {
+		t.Errorf("Got size %d, though wanted 1")
+	}
+	if int_inner[0] != cont.Int32Type() {
+		t.Errorf("Expected int32 type")
+	}
+
+	st_pointer := cont.StructType([]Type{cont.Int32Type(), cont.Int8Type()}, false)
+	st_inner := st_pointer.Subtypes()
+	if len(st_inner) != 2 {
+		t.Errorf("Got size %d, though wanted 2")
+	}
+	if st_inner[0] != cont.Int32Type() {
+		t.Errorf("Expected first struct field to be int32")
+	}
+	if st_inner[1] != cont.Int8Type() {
+		t.Errorf("Expected second struct field to be int8")
+	}
+}

Modified: vendor/llvm/dist/bindings/ocaml/llvm/llvm.ml
==============================================================================
--- vendor/llvm/dist/bindings/ocaml/llvm/llvm.ml	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/bindings/ocaml/llvm/llvm.ml	Sat Jun 10 13:44:06 2017	(r319780)
@@ -459,6 +459,8 @@ external is_packed : lltype -> bool = "llvm_is_packed"
 external is_opaque : lltype -> bool = "llvm_is_opaque"
 
 (*--... Operations on pointer, vector, and array types .....................--*)
+
+external subtypes : lltype -> lltype array = "llvm_subtypes"
 external array_type : lltype -> int -> lltype = "llvm_array_type"
 external pointer_type : lltype -> lltype = "llvm_pointer_type"
 external qualified_pointer_type : lltype -> int -> lltype

Modified: vendor/llvm/dist/bindings/ocaml/llvm/llvm.mli
==============================================================================
--- vendor/llvm/dist/bindings/ocaml/llvm/llvm.mli	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/bindings/ocaml/llvm/llvm.mli	Sat Jun 10 13:44:06 2017	(r319780)
@@ -658,6 +658,9 @@ val is_opaque : lltype -> bool
 
 (** {7 Operations on pointer, vector, and array types} *)
 
+(** [subtypes ty] returns [ty]'s subtypes *)
+val subtypes : lltype -> lltype array
+
 (** [array_type ty n] returns the array type containing [n] elements of type
     [ty]. See the method [llvm::ArrayType::get]. *)
 val array_type : lltype -> int -> lltype

Modified: vendor/llvm/dist/bindings/ocaml/llvm/llvm_ocaml.c
==============================================================================
--- vendor/llvm/dist/bindings/ocaml/llvm/llvm_ocaml.c	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/bindings/ocaml/llvm/llvm_ocaml.c	Sat Jun 10 13:44:06 2017	(r319780)
@@ -506,6 +506,20 @@ CAMLprim value llvm_is_opaque(LLVMTypeRef StructTy) {
 
 /*--... Operations on array, pointer, and vector types .....................--*/
 
+/* lltype -> lltype array */
+CAMLprim value llvm_subtypes(LLVMTypeRef Ty) {
+    CAMLparam0();
+    CAMLlocal1(Arr);
+
+    unsigned Size = LLVMGetNumContainedTypes(Ty);
+
+    Arr = caml_alloc(Size, 0);
+
+    LLVMGetSubtypes(Ty, (LLVMTypeRef *) Arr);
+
+    CAMLreturn(Arr);
+}
+
 /* lltype -> int -> lltype */
 CAMLprim LLVMTypeRef llvm_array_type(LLVMTypeRef ElementTy, value Count) {
   return LLVMArrayType(ElementTy, Int_val(Count));

Modified: vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake
==============================================================================
--- vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake	Sat Jun 10 13:44:06 2017	(r319780)
@@ -101,6 +101,10 @@ else()
   message(FATAL_ERROR "Unknown value for LLVM_ABI_BREAKING_CHECKS: \"${LLVM_ABI_BREAKING_CHECKS}\"!")
 endif()
 
+if( LLVM_REVERSE_ITERATION )
+  set( LLVM_ENABLE_REVERSE_ITERATION 1 )
+endif()
+
 if(WIN32)
   set(LLVM_HAVE_LINK_VERSION_SCRIPT 0)
   if(CYGWIN)
@@ -381,6 +385,9 @@ elseif( LLVM_COMPILER_IS_GCC_COMPATIBLE )
   if (LLVM_ENABLE_CXX1Y)
     check_cxx_compiler_flag("-std=c++1y" CXX_SUPPORTS_CXX1Y)
     append_if(CXX_SUPPORTS_CXX1Y "-std=c++1y" CMAKE_CXX_FLAGS)
+  elseif(LLVM_ENABLE_CXX1Z)
+    check_cxx_compiler_flag("-std=c++1z" CXX_SUPPORTS_CXX1Z)
+    append_if(CXX_SUPPORTS_CXX1Z "-std=c++1z" CMAKE_CXX_FLAGS)
   else()
     check_cxx_compiler_flag("-std=c++11" CXX_SUPPORTS_CXX11)
     if (CXX_SUPPORTS_CXX11)

Modified: vendor/llvm/dist/cmake/modules/TableGen.cmake
==============================================================================
--- vendor/llvm/dist/cmake/modules/TableGen.cmake	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/cmake/modules/TableGen.cmake	Sat Jun 10 13:44:06 2017	(r319780)
@@ -30,19 +30,43 @@ function(tablegen project ofn)
     endif()
   endif()
 
-  add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
-    # Generate tablegen output in a temporary file.
-    COMMAND ${${project}_TABLEGEN_EXE} ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR}
-    ${LLVM_TABLEGEN_FLAGS} 
-    ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
-    -o ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
-    # The file in LLVM_TARGET_DEFINITIONS may be not in the current
-    # directory and local_tds may not contain it, so we must
-    # explicitly list it here:
-    DEPENDS ${${project}_TABLEGEN_TARGET} ${local_tds} ${global_tds}
-    ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
-    COMMENT "Building ${ofn}..."
-    )
+  # We need both _TABLEGEN_TARGET and _TABLEGEN_EXE in the  DEPENDS list
+  # (both the target and the file) to have .inc files rebuilt on
+  # a tablegen change, as cmake does not propagate file-level dependencies
+  # of custom targets. See the following ticket for more information:
+  # https://cmake.org/Bug/view.php?id=15858
+  # We could always have just one dependency on both the target and
+  # the file, but these 2 cases would produce cleaner cmake files.
+  if (${${project}_TABLEGEN_TARGET} STREQUAL ${${project}_TABLEGEN_EXE})
+    add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
+      # Generate tablegen output in a temporary file.
+      COMMAND ${${project}_TABLEGEN_EXE} ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR}
+      ${LLVM_TABLEGEN_FLAGS}
+      ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
+      -o ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
+      # The file in LLVM_TARGET_DEFINITIONS may be not in the current
+      # directory and local_tds may not contain it, so we must
+      # explicitly list it here:
+      DEPENDS ${${project}_TABLEGEN_TARGET} ${local_tds} ${global_tds}
+      ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
+      COMMENT "Building ${ofn}..."
+      )
+  else()
+    add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
+      # Generate tablegen output in a temporary file.
+      COMMAND ${${project}_TABLEGEN_EXE} ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR}
+      ${LLVM_TABLEGEN_FLAGS}
+      ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
+      -o ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
+      # The file in LLVM_TARGET_DEFINITIONS may be not in the current
+      # directory and local_tds may not contain it, so we must
+      # explicitly list it here:
+      DEPENDS ${${project}_TABLEGEN_TARGET} ${${project}_TABLEGEN_EXE}
+        ${local_tds} ${global_tds}
+      ${LLVM_TARGET_DEFINITIONS_ABSOLUTE}
+      COMMENT "Building ${ofn}..."
+      )
+  endif()
   add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}
     # Only update the real output file if there are any differences.
     # This prevents recompilation of all the files depending on it if there

Modified: vendor/llvm/dist/docs/AMDGPUUsage.rst
==============================================================================
--- vendor/llvm/dist/docs/AMDGPUUsage.rst	Sat Jun 10 13:22:49 2017	(r319779)
+++ vendor/llvm/dist/docs/AMDGPUUsage.rst	Sat Jun 10 13:44:06 2017	(r319780)
@@ -1,109 +1,3441 @@
-==============================
-User Guide for AMDGPU Back-end
-==============================
+=============================
+User Guide for AMDGPU Backend
+=============================
 
+.. contents::
+   :local:
+
 Introduction
 ============
 
-The AMDGPU back-end provides ISA code generation for AMD GPUs, starting with
-the R600 family up until the current Volcanic Islands (GCN Gen 3).
+The AMDGPU backend provides ISA code generation for AMD GPUs, starting with the
+R600 family up until the current GCN families. It lives in the
+``lib/Target/AMDGPU`` directory.
 
-Refer to `AMDGPU section in Architecture & Platform Information for Compiler Writers <CompilerWriterInfo.html#amdgpu>`_
-for additional documentation.
+LLVM
+====
 
-Conventions
-===========
+.. _amdgpu-target-triples:
 
+Target Triples
+--------------
+
+Use the ``clang -target <Architecture>-<Vendor>-<OS>-<Environment>`` option to
+specify the target triple:
+
+  .. table:: AMDGPU Target Triples
+     :name: amdgpu-target-triples-table
+
+     ============ ======== ========= ===========
+     Architecture Vendor   OS        Environment
+     ============ ======== ========= ===========
+     r600         amd      <empty>   <empty>
+     amdgcn       amd      <empty>   <empty>
+     amdgcn       amd      amdhsa    <empty>
+     amdgcn       amd      amdhsa    opencl
+     amdgcn       amd      amdhsa    amdgizcl
+     amdgcn       amd      amdhsa    amdgiz
+     amdgcn       amd      amdhsa    hcc
+     ============ ======== ========= ===========
+
+``r600-amd--``
+  Supports AMD GPUs HD2XXX-HD6XXX for graphics and compute shaders executed on
+  the MESA runtime.
+
+``amdgcn-amd--``
+  Supports AMD GPUs GCN 6 onwards for graphics and compute shaders executed on
+  the MESA runtime.
+
+``amdgcn-amd-amdhsa-``
+  Supports AMD GCN GPUs GFX6 onwards for compute kernels executed on HSA [HSA]_
+  compatible runtimes such as AMD's ROCm [AMD-ROCm]_.
+
+``amdgcn-amd-amdhsa-opencl``
+  Supports AMD GCN GPUs GFX6 onwards for OpenCL compute kernels executed on HSA
+  [HSA]_ compatible runtimes such as AMD's ROCm [AMD-ROCm]_. See
+  :ref:`amdgpu-opencl`.
+
+``amdgcn-amd-amdhsa-amdgizcl``
+  Same as ``amdgcn-amd-amdhsa-opencl`` except a different address space mapping
+  is used (see :ref:`amdgpu-address-spaces`).
+
+``amdgcn-amd-amdhsa-amdgiz``
+  Same as ``amdgcn-amd-amdhsa-`` except a different address space mapping is
+  used (see :ref:`amdgpu-address-spaces`).
+
+``amdgcn-amd-amdhsa-hcc``
+  Supports AMD GCN GPUs GFX6 onwards for AMD HC language compute kernels
+  executed on HSA [HSA]_ compatible runtimes such as AMD's ROCm [AMD-ROCm]_. See
+  :ref:`amdgpu-hcc`.
+
+.. _amdgpu-processors:
+
+Processors
+----------
+
+Use the ``clang -mcpu <Processor>`` option to specify the AMD GPU processor. The
+names from both the *Processor* and *Alternative Processor* can be used.
+
+  .. table:: AMDGPU Processors
+     :name: amdgpu-processors-table
+
+     ========== =========== ============ ===== ======= ==================
+     Processor  Alternative Target       dGPU/ Runtime Example
+                Processor   Triple       APU   Support Products
+                            Architecture
+     ========== =========== ============ ===== ======= ==================
+     **R600** [AMD-R6xx]_
+     --------------------------------------------------------------------
+     r600                   r600         dGPU
+     r630                   r600         dGPU
+     rs880                  r600         dGPU
+     rv670                  r600         dGPU
+     **R700** [AMD-R7xx]_
+     --------------------------------------------------------------------
+     rv710                  r600         dGPU
+     rv730                  r600         dGPU
+     rv770                  r600         dGPU
+     **Evergreen** [AMD-Evergreen]_
+     --------------------------------------------------------------------
+     cedar                  r600         dGPU
+     redwood                r600         dGPU
+     sumo                   r600         dGPU
+     juniper                r600         dGPU
+     cypress                r600         dGPU
+     **Northern Islands** [AMD-Cayman-Trinity]_
+     --------------------------------------------------------------------
+     barts                  r600         dGPU
+     turks                  r600         dGPU
+     caicos                 r600         dGPU
+     cayman                 r600         dGPU
+     **GCN GFX6 (Southern Islands (SI))** [AMD-Souther-Islands]_
+     --------------------------------------------------------------------
+     gfx600     - SI        amdgcn       dGPU
+                - tahiti
+     gfx601     - pitcairn  amdgcn       dGPU
+                - verde
+                - oland
+                - hainan
+     **GCN GFX7 (Sea Islands (CI))** [AMD-Sea-Islands]_
+     --------------------------------------------------------------------
+     gfx700     - bonaire   amdgcn       dGPU          - Radeon HD 7790
+                                                       - Radeon HD 8770
+                                                       - R7 260
+                                                       - R7 260X
+     \          - kaveri    amdgcn       APU           - A6-7000
+                                                       - A6 Pro-7050B
+                                                       - A8-7100
+                                                       - A8 Pro-7150B
+                                                       - A10-7300
+                                                       - A10 Pro-7350B
+                                                       - FX-7500
+                                                       - A8-7200P
+                                                       - A10-7400P
+                                                       - FX-7600P
+     gfx701     - hawaii    amdgcn       dGPU  ROCm    - FirePro W8100
+                                                       - FirePro W9100
+                                                       - FirePro S9150
+                                                       - FirePro S9170
+     gfx702                              dGPU  ROCm    - Radeon R9 290
+                                                       - Radeon R9 290x
+                                                       - Radeon R390
+                                                       - Radeon R390x
+     gfx703     - kabini    amdgcn       APU           - E1-2100
+                - mullins                              - E1-2200
+                                                       - E1-2500
+                                                       - E2-3000
+                                                       - E2-3800
+                                                       - A4-5000
+                                                       - A4-5100
+                                                       - A6-5200
+                                                       - A4 Pro-3340B
+     **GCN GFX8 (Volcanic Islands (VI))** [AMD-Volcanic-Islands]_
+     --------------------------------------------------------------------
+     gfx800     - iceland   amdgcn       dGPU          - FirePro S7150
+                                                       - FirePro S7100
+                                                       - FirePro W7100
+                                                       - Radeon R285
+                                                       - Radeon R9 380
+                                                       - Radeon R9 385
+                                                       - Mobile FirePro
+                                                         M7170
+     gfx801     - carrizo   amdgcn       APU           - A6-8500P
+                                                       - Pro A6-8500B
+                                                       - A8-8600P
+                                                       - Pro A8-8600B
+                                                       - FX-8800P
+                                                       - Pro A12-8800B
+     \                      amdgcn       APU   ROCm    - A10-8700P
+                                                       - Pro A10-8700B
+                                                       - A10-8780P
+     \                      amdgcn       APU           - A10-9600P
+                                                       - A10-9630P
+                                                       - A12-9700P
+                                                       - A12-9730P
+                                                       - FX-9800P
+                                                       - FX-9830P
+     \                      amdgcn       APU           - E2-9010
+                                                       - A6-9210
+                                                       - A9-9410
+     gfx802     - tonga     amdgcn       dGPU  ROCm    Same as gfx800
+     gfx803     - fiji      amdgcn       dGPU  ROCm    - Radeon R9 Nano
+                                                       - Radeon R9 Fury
+                                                       - Radeon R9 FuryX
+                                                       - Radeon Pro Duo
+                                                       - FirePro S9300x2
+     \          - polaris10 amdgcn       dGPU  ROCm    - Radeon RX 470
+                                                       - Radeon RX 480
+     \          - polaris11 amdgcn       dGPU  ROCm    - Radeon RX 460
+     gfx804                 amdgcn       dGPU          Same as gfx803
+     gfx810     - stoney    amdgcn       APU
+     **GCN GFX9**
+     --------------------------------------------------------------------
+     gfx900                 amdgcn       dGPU          - FirePro W9500
+                                                       - FirePro S9500
+                                                       - FirePro S9500x2
+     gfx901                 amdgcn       dGPU  ROCm    Same as gfx900
+                                                       except XNACK is
+                                                       enabled
+     gfx902                 amdgcn       APU           *TBA*
+
+                                                       .. TODO
+                                                          Add product
+                                                          names.
+     gfx903                 amdgcn       APU           Same as gfx902
+                                                       except XNACK is
+                                                       enabled
+     ========== =========== ============ ===== ======= ==================
+
+.. _amdgpu-address-spaces:
+
 Address Spaces
 --------------
 
-The AMDGPU back-end uses the following address space mapping:
+The AMDGPU backend uses the following address space mappings.
 
-   ================== =================== ==============
-   LLVM Address Space DWARF Address Space Memory Space
-   ================== =================== ==============
-   0                  1                   Private
-   1                  N/A                 Global
-   2                  N/A                 Constant
-   3                  2                   Local
-   4                  N/A                 Generic (Flat)
-   5                  N/A                 Region
-   ================== =================== ==============
+The memory space names used in the table, aside from the region memory space, is
+from the OpenCL standard.
 
-The terminology in the table, aside from the region memory space, is from the
-OpenCL standard.
+LLVM Address Space number is used throughout LLVM (for example, in LLVM IR).
 
-LLVM Address Space is used throughout LLVM (for example, in LLVM IR). DWARF
-Address Space is emitted in DWARF, and is used by tools, such as debugger,
-profiler and others.
+  .. table:: Address Space Mapping
+     :name: amdgpu-address-space-mapping-table
 
+     ================== ================= ================= ================= =================
+     LLVM Address Space Memory Space
+     ------------------ -----------------------------------------------------------------------
+     \                  Current Default   amdgiz/amdgizcl   hcc               Future Default
+     ================== ================= ================= ================= =================
+     0                  Private (Scratch) Generic (Flat)    Generic (Flat)    Generic (Flat)
+     1                  Global            Global            Global            Global
+     2                  Constant          Constant          Constant          Region (GDS)
+     3                  Local (group/LDS) Local (group/LDS) Local (group/LDS) Local (group/LDS)
+     4                  Generic (Flat)    Region (GDS)      Region (GDS)      Constant
+     5                  Region (GDS)      Private (Scratch) Private (Scratch) Private (Scratch)
+     ================== ================= ================= ================= =================
+
+Current Default
+  This is the current default address space mapping used for all languages
+  except hcc. This will shortly be deprecated.
+
+amdgiz/amdgizcl
+  This is the current address space mapping used when ``amdgiz`` or ``amdgizcl``
+  is specified as the target triple environment value.
+
+hcc
+  This is the current address space mapping used when ``hcc`` is specified as
+  the target triple environment value.This will shortly be deprecated.
+
+Future Default
+  This will shortly be the only address space mapping for all languages using
+  AMDGPU backend.
+
+.. _amdgpu-memory-scopes:
+
+Memory Scopes
+-------------
+
+This section provides LLVM memory synchronization scopes supported by the AMDGPU
+backend memory model when the target triple OS is ``amdhsa`` (see
+:ref:`amdgpu-amdhsa-memory-model` and :ref:`amdgpu-target-triples`).
+
+The memory model supported is based on the HSA memory model [HSA]_ which is
+based in turn on HRF-indirect with scope inclusion [HRF]_. The happens-before
+relation is transitive over the synchonizes-with relation independent of scope,
+and synchonizes-with allows the memory scope instances to be inclusive (see
+table :ref:`amdgpu-amdhsa-llvm-sync-scopes-amdhsa-table`).
+
+This is different to the OpenCL [OpenCL]_ memory model which does not have scope
+inclusion and requires the memory scopes to exactly match. However, this
+is conservatively correct for OpenCL.
+
+  .. table:: AMDHSA LLVM Sync Scopes for AMDHSA
+     :name: amdgpu-amdhsa-llvm-sync-scopes-amdhsa-table
+
+     ================ ==========================================================
+     LLVM Sync Scope  Description
+     ================ ==========================================================
+     *none*           The default: ``system``.
+
+                      Synchronizes with, and participates in modification and
+                      seq_cst total orderings with, other operations (except
+                      image operations) for all address spaces (except private,
+                      or generic that accesses private) provided the other
+                      operation's sync scope is:
+
+                      - ``system``.
+                      - ``agent`` and executed by a thread on the same agent.
+                      - ``workgroup`` and executed by a thread in the same
+                        workgroup.
+                      - ``wavefront`` and executed by a thread in the same
+                        wavefront.
+
+     ``agent``        Synchronizes with, and participates in modification and
+                      seq_cst total orderings with, other operations (except
+                      image operations) for all address spaces (except private,
+                      or generic that accesses private) provided the other
+                      operation's sync scope is:
+
+                      - ``system`` or ``agent`` and executed by a thread on the
+                        same agent.
+                      - ``workgroup`` and executed by a thread in the same
+                        workgroup.
+                      - ``wavefront`` and executed by a thread in the same
+                        wavefront.
+
+     ``workgroup``    Synchronizes with, and participates in modification and
+                      seq_cst total orderings with, other operations (except
+                      image operations) for all address spaces (except private,
+                      or generic that accesses private) provided the other
+                      operation's sync scope is:
+
+                      - ``system``, ``agent`` or ``workgroup`` and executed by a
+                        thread in the same workgroup.
+                      - ``wavefront`` and executed by a thread in the same
+                        wavefront.
+
+     ``wavefront``    Synchronizes with, and participates in modification and
+                      seq_cst total orderings with, other operations (except
+                      image operations) for all address spaces (except private,
+                      or generic that accesses private) provided the other
+                      operation's sync scope is:
+
+                      - ``system``, ``agent``, ``workgroup`` or ``wavefront``
+                        and executed by a thread in the same wavefront.
+
+     ``singlethread`` Only synchronizes with, and participates in modification
+                      and seq_cst total orderings with, other operations (except
+                      image operations) running in the same thread for all
+                      address spaces (for example, in signal handlers).
+     ================ ==========================================================
+
+AMDGPU Intrinsics
+-----------------
+
+The AMDGPU backend implements the following intrinsics.
+
+*This section is WIP.*
+
+.. TODO
+   List AMDGPU intrinsics
+
+Code Object
+===========
+
+The AMDGPU backend generates a standard ELF [ELF]_ relocatable code object that
+can be linked by ``lld`` to produce a standard ELF shared code object which can
+be loaded and executed on an AMDGPU target.
+
+Header
+------
+
+The AMDGPU backend uses the following ELF header:
+
+  .. table:: AMDGPU ELF Header
+     :name: amdgpu-elf-header-table
+
+     ========================== =========================
+     Field                      Value
+     ========================== =========================
+     ``e_ident[EI_CLASS]``      ``ELFCLASS64``
+     ``e_ident[EI_DATA]``       ``ELFDATA2LSB``
+     ``e_ident[EI_OSABI]``      ``ELFOSABI_AMDGPU_HSA``
+     ``e_ident[EI_ABIVERSION]`` ``ELFABIVERSION_AMDGPU_HSA``
+     ``e_type``                 ``ET_REL`` or ``ET_DYN``
+     ``e_machine``              ``EM_AMDGPU``
+     ``e_entry``                0
+     ``e_flags``                0
+     ========================== =========================
+
+..
+
+  .. table:: AMDGPU ELF Header Enumeration Values
+     :name: amdgpu-elf-header-enumeration-values-table
+
+     ============================ =====
+     Name                         Value
+     ============================ =====
+     ``EM_AMDGPU``                224
+     ``ELFOSABI_AMDGPU_HSA``      64
+     ``ELFABIVERSION_AMDGPU_HSA`` 1
+     ============================ =====
+
+``e_ident[EI_CLASS]``
+  The ELF class is always ``ELFCLASS64``. The AMDGPU backend only supports 64 bit
+  applications.
+
+``e_ident[EI_DATA]``
+  All AMDGPU targets use ELFDATA2LSB for little-endian byte ordering.
+
+``e_ident[EI_OSABI]``
+  The AMD GPU architecture specific OS ABI of ``ELFOSABI_AMDGPU_HSA`` is used to
+  specify that the code object conforms to the AMD HSA runtime ABI [HSA]_.
+
+``e_ident[EI_ABIVERSION]``
+  The AMD GPU architecture specific OS ABI version of
+  ``ELFABIVERSION_AMDGPU_HSA`` is used to specify the version of AMD HSA runtime
+  ABI to which the code object conforms.
+
+``e_type``
+  Can be one of the following values:
+
+
+  ``ET_REL``
+    The type produced by the AMD GPU backend compiler as it is relocatable code
+    object.
+
+  ``ET_DYN``
+    The type produced by the linker as it is a shared code object.
+
+  The AMD HSA runtime loader requires a ``ET_DYN`` code object.
+
+``e_machine``
+  The value ``EM_AMDGPU`` is used for the machine for all members of the AMD GPU
+  architecture family. The specific member is specified in the
+  ``NT_AMD_AMDGPU_ISA`` entry in the ``.note`` section (see
+  :ref:`amdgpu-note-records`).
+
+``e_entry``
+  The entry point is 0 as the entry points for individual kernels must be
+  selected in order to invoke them through AQL packets.
+
+``e_flags``
+  The value is 0 as no flags are used.
+
+Sections
+--------
+
+An AMDGPU target ELF code object has the standard ELF sections which include:
+
+  .. table:: AMDGPU ELF Sections
+     :name: amdgpu-elf-sections-table
+
+     ================== ================ =================================
+     Name               Type             Attributes
+     ================== ================ =================================
+     ``.bss``           ``SHT_NOBITS``   ``SHF_ALLOC`` + ``SHF_WRITE``
+     ``.data``          ``SHT_PROGBITS`` ``SHF_ALLOC`` + ``SHF_WRITE``
+     ``.debug_``\ *\**  ``SHT_PROGBITS`` *none*
+     ``.dynamic``       ``SHT_DYNAMIC``  ``SHF_ALLOC``
+     ``.dynstr``        ``SHT_PROGBITS`` ``SHF_ALLOC``
+     ``.dynsym``        ``SHT_PROGBITS`` ``SHF_ALLOC``
+     ``.got``           ``SHT_PROGBITS`` ``SHF_ALLOC`` + ``SHF_WRITE``
+     ``.hash``          ``SHT_HASH``     ``SHF_ALLOC``
+     ``.note``          ``SHT_NOTE``     *none*
+     ``.rela``\ *name*  ``SHT_RELA``     *none*
+     ``.rela.dyn``      ``SHT_RELA``     *none*
+     ``.rodata``        ``SHT_PROGBITS`` ``SHF_ALLOC``
+     ``.shstrtab``      ``SHT_STRTAB``   *none*
+     ``.strtab``        ``SHT_STRTAB``   *none*
+     ``.symtab``        ``SHT_SYMTAB``   *none*
+     ``.text``          ``SHT_PROGBITS`` ``SHF_ALLOC`` + ``SHF_EXECINSTR``
+     ================== ================ =================================
+
+These sections have their standard meanings (see [ELF]_) and are only generated
+if needed.
+
+``.debug``\ *\**
+  The standard DWARF sections. See :ref:`amdgpu-dwarf` for information on the
+  DWARF produced by the AMDGPU backend.
+
+``.dynamic``, ``.dynstr``, ``.dynstr``, ``.hash``
+  The standard sections used by a dynamic loader.
+
+``.note``
+  See :ref:`amdgpu-note-records` for the note records supported by the AMDGPU
+  backend.
+
+``.rela``\ *name*, ``.rela.dyn``
+  For relocatable code objects, *name* is the name of the section that the
+  relocation records apply. For example, ``.rela.text`` is the section name for
+  relocation records associated with the ``.text`` section.
+
+  For linked shared code objects, ``.rela.dyn`` contains all the relocation
+  records from each of the relocatable code object's ``.rela``\ *name* sections.
+
+  See :ref:`amdgpu-relocation-records` for the relocation records supported by
+  the AMDGPU backend.
+
+``.text``
+  The executable machine code for the kernels and functions they call. Generated
+  as position independent code. See :ref:`amdgpu-code-conventions` for
+  information on conventions used in the isa generation.
+
+.. _amdgpu-note-records:
+
+Note Records
+------------
+
+As required by ``ELFCLASS64``, minimal zero byte padding must be generated after
+the ``name`` field to ensure the ``desc`` field is 4 byte aligned. In addition,
+minimal zero byte padding must be generated to ensure the ``desc`` field size is
+a multiple of 4 bytes. The ``sh_addralign`` field of the ``.note`` section must
+be at least 4 to indicate at least 8 byte alignment.
+
+The AMDGPU backend code object uses the following ELF note records in the
+``.note`` section. The *Description* column specifies the layout of the note
+record’s ``desc`` field. All fields are consecutive bytes. Note records with
+variable size strings have a corresponding ``*_size`` field that specifies the
+number of bytes, including the terminating null character, in the string. The
+string(s) come immediately after the preceding fields.
+
+Additional note records can be present.
+
+  .. table:: AMDGPU ELF Note Records
+     :name: amdgpu-elf-note-records-table
+
+     ===== ========================== ==========================================
+     Name  Type                       Description
+     ===== ========================== ==========================================
+     "AMD" ``NT_AMD_AMDGPU_METADATA`` <metadata null terminated string>
+     "AMD" ``NT_AMD_AMDGPU_ISA``      <isa name null terminated string>
+     ===== ========================== ==========================================
+
+..
+
+  .. table:: AMDGPU ELF Note Record Enumeration Values
+     :name: amdgpu-elf-note-record-enumeration-values-table
+
+     ============================= =====
+     Name                          Value
+     ============================= =====
+     *reserved*                    0-9
+     ``NT_AMD_AMDGPU_METADATA``    10
+     ``NT_AMD_AMDGPU_ISA``         11
+     ============================= =====
+
+``NT_AMD_AMDGPU_ISA``
+  Specifies the instruction set architecture used by the machine code contained
+  in the code object.
+
+  This note record is required for code objects containing machine code for
+  processors matching the ``amdgcn`` architecture in table
+  :ref:`amdgpu-processors`.
+
+  The null terminated string has the following syntax:
+
+    *architecture*\ ``-``\ *vendor*\ ``-``\ *os*\ ``-``\ *environment*\ ``-``\ *processor*
+
+  where:
+
+    *architecture*
+      The architecture from table :ref:`amdgpu-target-triples-table`.
+
+      This is always ``amdgcn`` when the target triple OS is ``amdhsa`` (see
+      :ref:`amdgpu-target-triples`).
+
+    *vendor*
+      The vendor from table :ref:`amdgpu-target-triples-table`.
+
+      For the AMDGPU backend this is always ``amd``.
+
+    *os*
+      The OS from table :ref:`amdgpu-target-triples-table`.
+
+    *environment*
+      An environment from table :ref:`amdgpu-target-triples-table`, or blank if
+      the environment has no affect on the execution of the code object.
+
+      For the AMDGPU backend this is currently always blank.
+    *processor*
+      The processor from table :ref:`amdgpu-processors-table`.
+
+  For example:
+
+    ``amdgcn-amd-amdhsa--gfx901``
+
+``NT_AMD_AMDGPU_METADATA``
+  Specifies extensible metadata associated with the code object. See
+  :ref:`amdgpu-code-object-metadata` for the syntax of the code object metadata
+  string.
+
+  This note record is required and must contain the minimum information
+  necessary to support the ROCM kernel queries. For example, the segment sizes
+  needed in a dispatch packet. In addition, a high level language runtime may
+  require other information to be included. For example, the AMD OpenCL runtime
+  records kernel argument information.
+
+  .. TODO
+     Is the string null terminated? It probably should not if YAML allows it to
+     contain null characters, otherwise it should be.
+
+.. _amdgpu-code-object-metadata:
+
+Code Object Metadata
+--------------------
+
+The code object metadata is specified by the ``NT_AMD_AMDHSA_METADATA`` note
+record (see :ref:`amdgpu-note-records`).
+
+The metadata is specified as a YAML formated string (see [YAML]_ and
+:doc:`YamlIO`).
+
+The metadata is represented as a single YAML document comprised of the mapping
+defined in table :ref:`amdgpu-amdhsa-code-object-metadata-mapping-table` and
+referenced tables.
+
+For boolean values, the string values of ``false`` and ``true`` are used for
+false and true respectively.
+
+Additional information can be added to the mappings. To avoid conflicts, any
+non-AMD key names should be prefixed by "*vendor-name*.".
+
+  .. table:: AMDHSA Code Object Metadata Mapping
+     :name: amdgpu-amdhsa-code-object-metadata-mapping-table
+
+     ========== ============== ========= =======================================
+     String Key Value Type     Required? Description
+     ========== ============== ========= =======================================
+     "Version"  sequence of    Required  - The first integer is the major
+                2 integers                 version. Currently 1.
+                                         - The second integer is the minor
+                                           version. Currently 0.
+     "Printf"   sequence of              Each string is encoded information
+                strings                  about a printf function call. The
+                                         encoded information is organized as
+                                         fields separated by colon (':'):
+
+                                         ``ID:N:S[0]:S[1]:...:S[N-1]:FormatString``
+
+                                         where:
+
+                                         ``ID``
+                                           A 32 bit integer as a unique id for
+                                           each printf function call
+
+                                         ``N``
+                                           A 32 bit integer equal to the number
+                                           of arguments of printf function call
+                                           minus 1
+
+                                         ``S[i]`` (where i = 0, 1, ... , N-1)
+                                           32 bit integers for the size in bytes
+                                           of the i-th FormatString argument of
+                                           the printf function call
+
+                                         FormatString
+                                           The format string passed to the
+                                           printf function call.
+     "Kernels"  sequence of    Required  Sequence of the mappings for each
+                mapping                  kernel in the code object. See
+                                         :ref:`amdgpu-amdhsa-code-object-kernel-metadata-mapping-table`
+                                         for the definition of the mapping.
+     ========== ============== ========= =======================================
+
+..
+
+  .. table:: AMDHSA Code Object Kernel Metadata Mapping
+     :name: amdgpu-amdhsa-code-object-kernel-metadata-mapping-table
+
+     ================= ============== ========= ================================
+     String Key        Value Type     Required? Description
+     ================= ============== ========= ================================
+     "Name"            string         Required  Source name of the kernel.
+     "SymbolName"      string         Required  Name of the kernel
+                                                descriptor ELF symbol.
+     "Language"        string                   Source language of the kernel.
+                                                Values include:
+
+                                                - "OpenCL C"
+                                                - "OpenCL C++"
+                                                - "HCC"
+                                                - "OpenMP"
+
+     "LanguageVersion" sequence of              - The first integer is the major
+                       2 integers                 version.
+                                                - The second integer is the
+                                                  minor version.
+     "Attrs"           mapping                  Mapping of kernel attributes.
+                                                See
+                                                :ref:`amdgpu-amdhsa-code-object-kernel-attribute-metadata-mapping-table`
+                                                for the mapping definition.
+     "Arguments"       sequence of              Sequence of mappings of the
+                       mapping                  kernel arguments. See
+                                                :ref:`amdgpu-amdhsa-code-object-kernel-argument-metadata-mapping-table`
+                                                for the definition of the mapping.
+     "CodeProps"       mapping                  Mapping of properties related to
+                                                the kernel code. See
+                                                :ref:`amdgpu-amdhsa-code-object-kernel-code-properties-metadata-mapping-table`
+                                                for the mapping definition.
+     "DebugProps"      mapping                  Mapping of properties related to
+                                                the kernel debugging. See
+                                                :ref:`amdgpu-amdhsa-code-object-kernel-debug-properties-metadata-mapping-table`
+                                                for the mapping definition.
+     ================= ============== ========= ================================
+
+..
+
+  .. table:: AMDHSA Code Object Kernel Attribute Metadata Mapping
+     :name: amdgpu-amdhsa-code-object-kernel-attribute-metadata-mapping-table
+
+     =================== ============== ========= ==============================
+     String Key          Value Type     Required? Description
+     =================== ============== ========= ==============================
+     "ReqdWorkGroupSize" sequence of              The dispatch work-group size
+                         3 integers               X, Y, Z must correspond to the
+                                                  specified values.
+
+                                                  Corresponds to the OpenCL
+                                                  ``reqd_work_group_size``
+                                                  attribute.
+     "WorkGroupSizeHint" sequence of              The dispatch work-group size
+                         3 integers               X, Y, Z is likely to be the
+                                                  specified values.
+
+                                                  Corresponds to the OpenCL
+                                                  ``work_group_size_hint``
+                                                  attribute.
+     "VecTypeHint"       string                   The name of a scalar or vector
+                                                  type.
+
+                                                  Corresponds to the OpenCL
+                                                  ``vec_type_hint`` attribute.
+     =================== ============== ========= ==============================
+
+..
+
+  .. table:: AMDHSA Code Object Kernel Argument Metadata Mapping
+     :name: amdgpu-amdhsa-code-object-kernel-argument-metadata-mapping-table
+
+     ================= ============== ========= ================================
+     String Key        Value Type     Required? Description
+     ================= ============== ========= ================================
+     "Name"            string                   Kernel argument name.
+     "TypeName"        string                   Kernel argument type name.
+     "Size"            integer        Required  Kernel argument size in bytes.
+     "Align"           integer        Required  Kernel argument alignment in
+                                                bytes. Must be a power of two.
+     "ValueKind"       string         Required  Kernel argument kind that
+                                                specifies how to set up the
+                                                corresponding argument.
+                                                Values include:
+
+                                                "ByValue"
+                                                  The argument is copied
+                                                  directly into the kernarg.
+
+                                                "GlobalBuffer"
+                                                  A global address space pointer
+                                                  to the buffer data is passed
+                                                  in the kernarg.
+
+                                                "DynamicSharedPointer"
+                                                  A group address space pointer
+                                                  to dynamically allocated LDS
+                                                  is passed in the kernarg.
+
+                                                "Sampler"
+                                                  A global address space
+                                                  pointer to a S# is passed in
+                                                  the kernarg.
+
+                                                "Image"
+                                                  A global address space
+                                                  pointer to a T# is passed in
+                                                  the kernarg.
+
+                                                "Pipe"
+                                                  A global address space pointer
+                                                  to an OpenCL pipe is passed in
+                                                  the kernarg.
+
+                                                "Queue"
+                                                  A global address space pointer
+                                                  to an OpenCL device enqueue
+                                                  queue is passed in the
+                                                  kernarg.
+
+                                                "HiddenGlobalOffsetX"

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