Date: Fri, 11 Mar 2022 11:31:30 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: b6fd96ed0b40 - main - Add the PMCR_EL0.N arm64 register field Message-ID: <202203111131.22BBVUxO076682@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=b6fd96ed0b40e5a42eaea662b5461070c93a1c6c commit b6fd96ed0b40e5a42eaea662b5461070c93a1c6c Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2022-03-11 11:06:44 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2022-03-11 11:21:09 +0000 Add the PMCR_EL0.N arm64 register field Sponsored by: Innovate UK --- sys/arm64/include/armreg.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 86e43190e002..d328cdb71043 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -1119,6 +1119,8 @@ #define PMCR_X (1 << 4) /* Export to ext. monitoring (ETM) */ #define PMCR_DP (1 << 5) /* Disable CCNT if non-invasive debug*/ #define PMCR_LC (1 << 6) /* Long cycle count enable */ +#define PMCR_N_SHIFT 11 +#define PMCR_N_MASK (0x1f << PMCR_N_SHIFT) #define PMCR_IMP_SHIFT 24 /* Implementer code */ #define PMCR_IMP_MASK (0xff << PMCR_IMP_SHIFT) #define PMCR_IMP_ARM 0x41
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