Date: Mon, 5 Nov 2012 09:49:19 -0700 From: Warner Losh <imp@bsdimp.com> To: Eitan Adler <lists@eitanadler.com> Cc: "Rodney W. Grimes" <freebsd@pdx.rh.cn85.chatusa.com>, Juli Mallett <juli@clockworksquid.com>, "freebsd-mips@FreeBSD.org" <freebsd-mips@freebsd.org> Subject: Re: CACHE_LINE_SIZE macro. Message-ID: <DAE462F0-9D85-4942-8826-C0709E36D3B7@bsdimp.com> In-Reply-To: <CAF6rxgn-bNJOuvdiRj_UUGQUTRaeOt54OdzHOioNz5f566hoig@mail.gmail.com> References: <CACVs6=_BrwJ19CPj7OqKvV8boHfujVWqn96u3VPUmZ040JpAeQ@mail.gmail.com> <201211041828.qA4ISomC076058@pdx.rh.CN85.ChatUSA.com> <CAF6rxgn-bNJOuvdiRj_UUGQUTRaeOt54OdzHOioNz5f566hoig@mail.gmail.com>
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On Nov 5, 2012, at 9:23 AM, Eitan Adler wrote: > On 4 November 2012 13:28, Rodney W. Grimes > <freebsd@pdx.rh.cn85.chatusa.com> wrote: >>=20 >> What ABI is exposing anything about cache parameters or may be come = dependent >> on such information? >=20 > There has been some discussion recently about padding lock mutexs to > the cache line size in order to avoid false sharing of CPUs. Some have > claimed to see significant performance increases as a result. Is that an out-of-kernel interface? If we did that, we'd have to make it run-time settable, because there's = no one right answer for arm and MIPS cpus: they are all different. Warner
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