Date: Thu, 22 Oct 2015 08:08:06 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289745 - head/sys/mips/conf Message-ID: <201510220808.t9M886On002687@repo.freebsd.org>
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Author: adrian Date: Thu Oct 22 08:08:06 2015 New Revision: 289745 URL: https://svnweb.freebsd.org/changeset/base/289745 Log: Add support for the TP-Link TL-WR740N v4. This is an AR9331 part based on the AP121 reference design but with 32MB RAM. Yes, it has 4MB flash and it has no USB, so clever hacks are required to get it up and working. But boot/work it does. Added: head/sys/mips/conf/TL-WR740Nv4 (contents, props changed) head/sys/mips/conf/TL-WR740Nv4.hints (contents, props changed) Added: head/sys/mips/conf/TL-WR740Nv4 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/mips/conf/TL-WR740Nv4 Thu Oct 22 08:08:06 2015 (r289745) @@ -0,0 +1,53 @@ +# +# TP-Link WR740N v4 +# +# * AR9330 SoC +# * 32MB RAM +# * 4MB flash +# * Integrated 1x1 2GHz wifi and 10/100 bridge +# +# $FreeBSD$ +# + +# Include the default AR933x parameters +include "AR933X_BASE" + +ident CARAMBOLA2 + +# Override hints with board values +hints "CARAMBOLA2.hints" + +# Board memory - 32MB +options AR71XX_REALMEM=(32*1024*1024) + +# i2c GPIO bus +#device gpioiic +#device iicbb +#device iicbus +#device iic + +# Options required for miiproxy and mdiobus +options ARGE_MDIO # Export an MDIO bus separate from arge +device miiproxy # MDIO bus <-> MII PHY rendezvous + +device etherswitch +device arswitch + +# read MSDOS formatted disks - USB +#options MSDOSFS + +# Enable the uboot environment stuff rather then the +# redboot stuff. +options AR71XX_ENV_UBOOT + +# uzip - to boot natively from flash +device geom_uncompress +options GEOM_UNCOMPRESS + +# Used for the static uboot partition map +device geom_map + +# Boot off of the rootfs, as defined in the geom_map setup. +# options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\" +# Note: we don't fit in 4MB flash, so the rootfs must be on USB for now +options ROOTDEVNAME=\"ufs:da0\" Added: head/sys/mips/conf/TL-WR740Nv4.hints ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/mips/conf/TL-WR740Nv4.hints Thu Oct 22 08:08:06 2015 (r289745) @@ -0,0 +1,87 @@ +# +# This file adds to the values in AR933X_BASE.hints +# +# $FreeBSD$ + +# mdiobus on arge1 +hint.argemdio.0.at="nexus0" +hint.argemdio.0.maddr=0x1a000000 +hint.argemdio.0.msize=0x1000 +hint.argemdio.0.order=0 + +# Embedded Atheros Switch +hint.arswitch.0.at="mdio0" + +# XXX this should really say it's an AR933x switch, as there +# are some vlan specific differences here! +hint.arswitch.0.is_7240=1 +hint.arswitch.0.numphys=4 +hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY +hint.arswitch.0.is_rgmii=0 +hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII + +# arge0 - MII, autoneg, phy(4) +hint.arge.0.phymask=0x10 # PHY4 +hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus +hint.arge.0.eeprommac=0x1fff0000 + +# arge1 - GMII, 1000/full +hint.arge.1.phymask=0x0 # No directly mapped PHYs +hint.arge.1.media=1000 +hint.arge.1.fduplex=1 +hint.arge.1.eeprommac=0x1fff0006 + +# Where the ART is - last 64k in the flash +# 0x9fff1000 ? +hint.ath.0.eepromaddr=0x1fff0000 +hint.ath.0.eepromsize=16384 + +# The TL-WR740N v4 is a default AP121 - it comes with 4MB flash. +# +# The boot parameters: +# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init +# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs), +# 896k(uImage),64k(NVRAM),64k(ART) +# bootcmd=bootm 0x9f020000 +# +# .. so uboot is 128K, there's no ubootenv, and the runtime image starts +# at 0x9f020000. + +hint.map.0.at="flash/spi0" +hint.map.0.start=0x00000000 +hint.map.0.end=0x000020000 +hint.map.0.name="uboot" +hint.map.0.readonly=1 + +hint.map.1.at="flash/spi0" +hint.map.1.start=0x00020000 +hint.map.1.end=0x003e0000 +hint.map.1.name="kernel" +hint.map.1.readonly=0 + +hint.map.2.at="flash/spi0" +hint.map.2.start=0x003e0000 +hint.map.2.end=0x003f0000 +hint.map.2.name="cfg" +hint.map.2.readonly=0 + +# This is radio calibration section. It is (or should be!) unique +# for each board, to take into account thermal and electrical differences +# as well as the regulatory compliance data. +# +hint.map.3.at="flash/spi0" +hint.map.3.start=0x003f0000 +hint.map.3.end=0x0x400000 +hint.map.3.name="art" +hint.map.3.readonly=1 + +# GPIO specific configuration block + +# Don't flip on anything that isn't already enabled. +# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're +# not used here. +hint.gpio.0.function_set=0x00000000 +hint.gpio.0.function_clear=0x00000000 + +# These are the GPIO LEDs and buttons which can be software controlled. +# hint.gpio.0.pinmask=0x00fc1803
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