Date: Mon, 13 Nov 2023 11:34:56 +0000 From: bugzilla-noreply@freebsd.org To: bugs@FreeBSD.org Subject: [Bug 273263] isp(4): 32Gbit Qlogic cards do not work Message-ID: <bug-273263-227-TH7KD2F04x@https.bugs.freebsd.org/bugzilla/> In-Reply-To: <bug-273263-227@https.bugs.freebsd.org/bugzilla/> References: <bug-273263-227@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D273263 --- Comment #13 from Joerg Pulz <Joerg.Pulz@frm2.tum.de> --- (In reply to Joerg Pulz from comment #12) Thanks to Arne for handing over hte 26xx based adapters at the weekend. As promised - here are the results for a 26xx based - QLogic ISP 2031 (QLogic QLE2662 16Gbit 2Port FC Adapter) Output using hint.isp.0.debug=3D"0x3f" and hint.isp.0.fwload_disable NOT se= t and FLT handling/parsing enabled: isp0: <Qlogic ISP 2031 PCI FC-AL Adapter> mem 0xb8a0a000-0xb8a0bfff,0xb8a04000-0xb8a07fff,0xb8900000-0xb89fffff at device= 0.0 numa-domain 0 on pci9 isp0: set PCI latency to 64 isp0: request area @ 0x3d2639000/0x80000 isp0: response area @ 0x3d2751000/0x10000 isp0: FLTL[DEF]: 0xfc400 isp0: FLT[DEF]: version=3D0x1 length=3D0x628(1576) checksum=3D0x1368 isp0: FLT[DEF]: regions=3D98 isp0: FLT[0x70]: start=3D0x0 end=3D0xfff size=3D0x1000 attribute=3D0x0 isp0: FLT[0xbe]: start=3D0x1000 end=3D0x3bff size=3D0x2c00 attribute=3D0x0 isp0: FLT[0xa5]: start=3D0x3c00 end=3D0x3fff size=3D0x400 attribute=3D0x0 isp0: FLT[0x72]: start=3D0x4000 end=3D0xbfff size=3D0x8000 attribute=3D0x0 isp0: FLT[0xa6]: start=3D0xc000 end=3D0xffff size=3D0x4000 attribute=3D0x0 isp0: FLT[0x2e]: start=3D0x10000 end=3D0x1ffff size=3D0x10000 attribute=3D0= x0 isp0: FLT[0xa2]: start=3D0x20000 end=3D0x2ffff size=3D0x10000 attribute=3D0= x0 isp0: FLT[0x4f]: start=3D0x30000 end=3D0x3ffff size=3D0x10000 attribute=3D0= x0 isp0: FLT[0x97]: start=3D0x40000 end=3D0xbffff size=3D0x80000 attribute=3D0= x2 isp0: FLT[0x73]: start=3D0xc0000 end=3D0xdbfff size=3D0x1c000 attribute=3D0= x0 isp0: FLT[0x71]: start=3D0xdc000 end=3D0xdd3ff size=3D0x1400 attribute=3D0x0 isp0: FLT[0x8d]: start=3D0xdd400 end=3D0xdfbff size=3D0x2800 attribute=3D0x0 isp0: FLT[0x91]: start=3D0xdfc00 end=3D0xdffff size=3D0x400 attribute=3D0x0 isp0: FLT[0x82]: start=3D0xe0000 end=3D0xe3fff size=3D0x4000 attribute=3D0x0 isp0: FLT[0x76]: start=3D0xe4000 end=3D0xe40ff size=3D0x100 attribute=3D0x4 isp0: FLT[0x85]: start=3D0xe4100 end=3D0xe41ff size=3D0x100 attribute=3D0x4 isp0: FLT[0xa7]: start=3D0xe4200 end=3D0xe42ff size=3D0x100 attribute=3D0x4 isp0: FLT[0xa8]: start=3D0xe4300 end=3D0xe43ff size=3D0x100 attribute=3D0x4 isp0: FLT[0x8c]: start=3D0xe4400 end=3D0xe7fff size=3D0x3c00 attribute=3D0x0 isp0: FLT[0x65]: start=3D0xe8000 end=3D0xe81ff size=3D0x200 attribute=3D0x0 isp0: FLT[0x99]: start=3D0xe8200 end=3D0xebfff size=3D0x3e00 attribute=3D0x0 isp0: FLT[0xad]: start=3D0xec000 end=3D0xec07f size=3D0x80 attribute=3D0x0 isp0: FLT[0xae]: start=3D0xec080 end=3D0xec0ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xaf]: start=3D0xec100 end=3D0xec17f size=3D0x80 attribute=3D0x0 isp0: FLT[0xb0]: start=3D0xec180 end=3D0xec1ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xbf]: start=3D0xec200 end=3D0xeffff size=3D0x3e00 attribute=3D0x0 isp0: FLT[0xb2]: start=3D0xf0000 end=3D0xf007f size=3D0x80 attribute=3D0x0 isp0: FLT[0xb3]: start=3D0xf0080 end=3D0xf00ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xb4]: start=3D0xf0100 end=3D0xf017f size=3D0x80 attribute=3D0x0 isp0: FLT[0xb5]: start=3D0xf0180 end=3D0xf01ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xc0]: start=3D0xf0200 end=3D0xf3fff size=3D0x3e00 attribute=3D0x0 isp0: FLT[0x77]: start=3D0xf4000 end=3D0xf7fff size=3D0x4000 attribute=3D0x0 isp0: FLT[0x89]: start=3D0xf8000 end=3D0xf9fff size=3D0x2000 attribute=3D0x0 isp0: FLT[0x80]: start=3D0xfa000 end=3D0xfa2ff size=3D0x300 attribute=3D0x0 isp0: FLT[0x81]: start=3D0xfa300 end=3D0xfa3ff size=3D0x100 attribute=3D0x0 isp0: FLT[0x8a]: start=3D0xfa400 end=3D0xfbfff size=3D0x1c00 attribute=3D0x0 isp0: FLT[0x1a]: start=3D0xfc000 end=3D0xfc01f size=3D0x20 attribute=3D0x0 isp0: FLT[0x1b]: start=3D0xfc020 end=3D0xfc3ff size=3D0x3e0 attribute=3D0x0 isp0: FLT[0x1c]: start=3D0xfc400 end=3D0xfc7ff size=3D0x400 attribute=3D0x0 isp0: FLT[0x26]: start=3D0xfc800 end=3D0xfcbff size=3D0x400 attribute=3D0x0 isp0: FLT[0x8b]: start=3D0xfcc00 end=3D0xfffff size=3D0x3400 attribute=3D0x0 isp0: FLT[0x6e]: start=3D0x100000 end=3D0x103fff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x69]: start=3D0x104000 end=3D0x107fff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x6a]: start=3D0x108000 end=3D0x127fff size=3D0x20000 attribute= =3D0x0 isp0: FLT[0xbb]: start=3D0x128000 end=3D0x12bfff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x6f]: start=3D0x12c000 end=3D0x12ffff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x84]: start=3D0x130000 end=3D0x137fff size=3D0x8000 attribute=3D= 0x0 isp0: FLT[0x93]: start=3D0x138000 end=3D0x13bfff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0xb1]: start=3D0x13c000 end=3D0x13ffff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x87]: start=3D0x140000 end=3D0x141fff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0x88]: start=3D0x142000 end=3D0x143fff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0xc6]: start=3D0x144000 end=3D0x147fff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0xa3]: start=3D0x148000 end=3D0x14ffff size=3D0x8000 attribute=3D= 0x0 isp0: FLT[0x63]: start=3D0x150000 end=3D0x17ffff size=3D0x30000 attribute= =3D0x0 isp0: FLT[0x98]: start=3D0x180000 end=3D0x1fffff size=3D0x80000 attribute= =3D0x0 isp0: FLT[0x7]: start=3D0x200000 end=3D0x20ffff size=3D0x10000 attribute=3D= 0x0 isp0: FLT[0x11]: start=3D0x210000 end=3D0x21ffff size=3D0x10000 attribute= =3D0x0 isp0: FLT[0xa4]: start=3D0x220000 end=3D0x23ffff size=3D0x20000 attribute= =3D0x2 isp0: FLT[0x1]: start=3D0x240000 end=3D0x25ffff size=3D0x20000 attribute=3D= 0x2 isp0: FLT[0x13]: start=3D0x260000 end=3D0x26ffff size=3D0x10000 attribute= =3D0x0 isp0: FLT[0x14]: start=3D0x270000 end=3D0x27007f size=3D0x80 attribute=3D0x0 isp0: FLT[0x15]: start=3D0x270080 end=3D0x2700ff size=3D0x80 attribute=3D0x0 isp0: FLT[0x16]: start=3D0x270100 end=3D0x27017f size=3D0x80 attribute=3D0x0 isp0: FLT[0x17]: start=3D0x270180 end=3D0x2701ff size=3D0x80 attribute=3D0x0 isp0: FLT[0x18]: start=3D0x270200 end=3D0x273fff size=3D0x3e00 attribute=3D= 0x0 isp0: FLT[0xa9]: start=3D0x274000 end=3D0x27407f size=3D0x80 attribute=3D0x0 isp0: FLT[0xaa]: start=3D0x274080 end=3D0x2740ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xab]: start=3D0x274100 end=3D0x27417f size=3D0x80 attribute=3D0x0 isp0: FLT[0xac]: start=3D0x274180 end=3D0x2741ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xb6]: start=3D0x274200 end=3D0x27427f size=3D0x80 attribute=3D0x0 isp0: FLT[0xb7]: start=3D0x274280 end=3D0x2742ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xb8]: start=3D0x274300 end=3D0x27437f size=3D0x80 attribute=3D0x0 isp0: FLT[0xb9]: start=3D0x274380 end=3D0x2743ff size=3D0x80 attribute=3D0x0 isp0: FLT[0xbc]: start=3D0x274400 end=3D0x277fff size=3D0x3c00 attribute=3D= 0x0 isp0: FLT[0xba]: start=3D0x278000 end=3D0x278bff size=3D0xc00 attribute=3D0= x0 isp0: FLT[0xbd]: start=3D0x278c00 end=3D0x27bfff size=3D0x3400 attribute=3D= 0x0 isp0: FLT[0x50]: start=3D0x27c000 end=3D0x27c07f size=3D0x80 attribute=3D0x0 isp0: FLT[0x51]: start=3D0x27c080 end=3D0x27c0ff size=3D0x80 attribute=3D0x0 isp0: FLT[0x52]: start=3D0x27c100 end=3D0x27c17f size=3D0x80 attribute=3D0x0 isp0: FLT[0x53]: start=3D0x27c180 end=3D0x27c1ff size=3D0x80 attribute=3D0x0 isp0: FLT[0x58]: start=3D0x27c200 end=3D0x27ffff size=3D0x3e00 attribute=3D= 0x0 isp0: FLT[0x1d]: start=3D0x280000 end=3D0x2801ff size=3D0x200 attribute=3D0= x0 isp0: FLT[0x1e]: start=3D0x280200 end=3D0x2803ff size=3D0x200 attribute=3D0= x0 isp0: FLT[0x1f]: start=3D0x280400 end=3D0x2805ff size=3D0x200 attribute=3D0= x0 isp0: FLT[0x20]: start=3D0x280600 end=3D0x2807ff size=3D0x200 attribute=3D0= x0 isp0: FLT[0x27]: start=3D0x280800 end=3D0x283fff size=3D0x3800 attribute=3D= 0x0 isp0: FLT[0x21]: start=3D0x284000 end=3D0x287fff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0x23]: start=3D0x288000 end=3D0x297fff size=3D0x10000 attribute= =3D0x0 isp0: FLT[0x24]: start=3D0x298000 end=3D0x2a7fff size=3D0x10000 attribute= =3D0x0 isp0: FLT[0x29]: start=3D0x2a8000 end=3D0x2a9fff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0x2a]: start=3D0x2aa000 end=3D0x2abfff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0xc2]: start=3D0x2ac000 end=3D0x2adfff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0xc3]: start=3D0x2ae000 end=3D0x2affff size=3D0x2000 attribute=3D= 0x0 isp0: FLT[0x2f]: start=3D0x2b0000 end=3D0x2cffff size=3D0x20000 attribute= =3D0x0 isp0: FLT[0xc4]: start=3D0x2d0000 end=3D0x2effff size=3D0x20000 attribute= =3D0x0 isp0: FLT[0xc5]: start=3D0x2f0000 end=3D0x2f3fff size=3D0x4000 attribute=3D= 0x0 isp0: FLT[0xc1]: start=3D0x2f4000 end=3D0x3fffff size=3D0x10c000 attribute= =3D0x0 isp0: FLT[0xff]: start=3D0x0 end=3D0x3fffff size=3D0x400000 attribute=3D0x0 isp0: FLT[FLT]: boot=3D0x200000 fw=3D0x240000 vpd_nvram=3D0x270000 vpd=3D0x= 270000 nvram=3D0x270080 fdt=3D0xfc000 flt=3D0xfc400 npiv=3D0x2a8000 fcp_prif_cfg= =3D0x140000 isp0: Loaded ispfw(4) firmware isp_2600 isp0: Firmware revision (ispfw) 8.8.231 (78d0d5). isp0: LOAD RISC RAM 72719 (0x11c0f) words at load address 0x100000 isp0: LOAD RISC RAM 16659 (0x4113) words at load address 0x11b000 isp0: Firmware ability mask: 0xffff0000 isp0: Maximum supported speed: 16Gbit/s isp0: Board Type 2600, Chip Revision 0x2, loaded F/W Revision 8.8.231 isp0: FW Attributes Lower: Class2 MultiID T10CRC MQ MSIX VP0_Decoupling Hot= FW isp0: FW Attributes Upper: EXMOFF NPMOFF DIFCHOP (unknown 0x0020) isp0: FW Ext. Attributes Lower: ASICTMP ATIOMQ isp0: FW Ext. Attributes Upper: isp0: 2048 max I/O command limit set isp0: NVRAM 0x50014380231e9df5 0x50014380231e9df4 maxframelen 2048 isp0: NVRAM loopid 0 fwopt1 0x6006 fwopt2 0x1026 fwopt3 0x4000 isp0: Chan 0 0x50014380231e9df5/0x50014380231e9df4 Role Initiator isp0: Setting ICB Node 0x50014380231e9df5 Port 0x50014380231e9df4 isp0: isp_init: fwopt1 0x6006 fwopt2 0x4401026 fwopt3 0x4022 isp0: isp_init: rqst 00000003d2639000 rsp 00000003d2751000 isp0: isp_init: isp0: 0x00000000: 01 00 00 00 00 08 00 00 00 00 00 00 50 01 43 80 isp0: 0x00000010: 23 1e 9d f4 50 01 43 80 23 1e 9d f5 00 00 00 00 isp0: 0x00000020: 03 00 00 00 00 04 00 20 00 00 00 00 00 90 63 d2 isp0: 0x00000030: 03 00 00 00 00 10 75 d2 03 00 00 00 00 00 00 00 isp0: 0x00000040: 00 00 00 00 01 00 02 00 00 00 00 00 00 00 00 00 isp0: 0x00000050: 00 00 00 00 00 00 00 00 00 00 0a 00 06 60 00 00 isp0: 0x00000060: 26 10 40 04 22 40 00 00 00 00 00 00 00 00 00 00 isp0: 0x00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 isp0: INIT F/W from 00000003c1d41000 Output using hint.isp.0.debug=3D"0xf" and hint.isp.0.fwload_disable=3D"1" a= nd FLT handling/parsing enabled: isp0: <Qlogic ISP 2031 PCI FC-AL Adapter> mem 0xb8a0a000-0xb8a0bfff,0xb8a04000-0xb8a07fff,0xb8900000-0xb89fffff at device= 0.0 numa-domain 0 on pci9 isp0: FLT[FLT]: boot=3D0x200000 fw=3D0x240000 vpd_nvram=3D0x270000 vpd=3D0x= 270000 nvram=3D0x270080 fdt=3D0xfc000 flt=3D0xfc400 npiv=3D0x2a8000 fcp_prif_cfg= =3D0x140000 isp0: Skipping ispfw(4) firmware download isp0: Instruct RISC to load firmware from flash by itself isp0: Firmware ability mask: 0xbfcd0000 isp0: Maximum supported speed: 16Gbit/s isp0: Board Type 2600, Chip Revision 0x2, resident F/W Revision 7.3.1 isp0: FW Attributes Lower: Class2 MultiID T10CRC MQ MSIX VP0_Decoupling Hot= FW isp0: FW Attributes Upper: EXMOFF NPMOFF DIFCHOP (unknown 0x0020) isp0: FW Ext. Attributes Lower: ASICTMP ATIOMQ isp0: FW Ext. Attributes Upper: isp0: 2048 max I/O command limit set isp0: Chan 0 0x50014380231e9df5/0x50014380231e9df4 Role Initiator --=20 You are receiving this mail because: You are the assignee for the bug.=
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