Date: Wed, 9 Mar 2005 18:49:20 +0200 From: "Chris Dionissopoulos" <dionch@freemail.gr> To: "Theo Schlossnagle" <jesus@omniti.com>, <freebsd-net@freebsd.org> Subject: Re: FreeBSD 5.3 if_re.c (re) altq compatibility patch Message-ID: <005f01c524c7$f230e670$3c00000a@R3B> References: <422EFEE4.6090401@omniti.com>
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Hi Theo,
I think you must overwrite your patch @ 2016 line, with this one:
@@ -2016,7 +2018,7 @@
idx = sc->rl_ldata.rl_tx_prodidx;
while (sc->rl_ldata.rl_tx_mbuf[idx] == NULL) {
- IF_DEQUEUE(&ifp->if_snd, m_head);
+ IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
if (m_head == NULL)
break;
if (re_encap(sc, &m_head, &idx)) {
- IF_PREPEND(&ifp->if_snd, m_head);
+ IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
ifp->if_flags |= IFF_OACTIVE;
break;
}as refered in
http://people.freebsd.org/~mlaier/ALTQ_driver/if_re.c.patchChris.-----
Original Message -----
From: "Theo Schlossnagle" <jesus@omniti.com>
To: <freebsd-net@freebsd.org>
Sent: Wednesday, March 09, 2005 3:49 PM
Subject: FreeBSD 5.3 if_re.c (re) altq compatibility patch
> Howdy,
>
> On my FreBSD 5.3-p5 box, the "re" ethernet driver doesn't support altq.
> Here's a patch to convert if_re.c to use the IFQ macros for altq
> compatibility.
>
> --- /usr/src/sys/dev/re/if_re.c.old Tue Feb 1 21:37:26 2005
> +++ /usr/src/sys/dev/re/if_re.c Tue Feb 1 22:20:04 2005
> @@ -1203,7 +1203,9 @@
> ifp->if_baudrate = 1000000000;
> else
> ifp->if_baudrate = 100000000;
> - ifp->if_snd.ifq_maxlen = RL_IFQ_MAXLEN;
> + IFQ_SET_MAXLEN(&ifp->if_snd, RL_IFQ_MAXLEN);
> + ifp->if_snd.ifq_drv_maxlen = RL_IFQ_MAXLEN;
> + IFQ_SET_READY(&ifp->if_snd);
> ifp->if_capenable = ifp->if_capabilities;
>
> callout_handle_init(&sc->rl_stat_ch);
> @@ -1786,7 +1788,7 @@
> re_rxeof(sc);
> re_txeof(sc);
>
> - if (ifp->if_snd.ifq_head != NULL)
> + if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
> re_start_locked(ifp);
>
> if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register
> */
> @@ -1870,7 +1872,7 @@
> }
> }
>
> - if (ifp->if_snd.ifq_head != NULL)
> + if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
> re_start_locked(ifp);
>
> done_locked:
> @@ -2007,7 +2009,7 @@
> {
> struct rl_softc *sc;
> struct mbuf *m_head = NULL;
> - int idx;
> + int idx, queued = 0;
>
> sc = ifp->if_softc;
>
> @@ -2016,7 +2018,7 @@
> idx = sc->rl_ldata.rl_tx_prodidx;
>
> while (sc->rl_ldata.rl_tx_mbuf[idx] == NULL) {
> - IF_DEQUEUE(&ifp->if_snd, m_head);
> + IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
> if (m_head == NULL)
> break;
>
> @@ -2031,25 +2033,27 @@
> * to him.
> */
> BPF_MTAP(ifp, m_head);
> +
> + queued++;
> }
>
> /* Flush the TX descriptors */
> + if (queued) {
> + bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
> + sc->rl_ldata.rl_tx_list_map,
> + BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
>
> - bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
> - sc->rl_ldata.rl_tx_list_map,
> - BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
> -
> - sc->rl_ldata.rl_tx_prodidx = idx;
> + sc->rl_ldata.rl_tx_prodidx = idx;
>
> /*
> * RealTek put the TX poll request register in a different
> * location on the 8169 gigE chip. I don't know why.
> */
>
> - if (sc->rl_type == RL_8169)
> - CSR_WRITE_2(sc, RL_GTXSTART, RL_TXSTART_START);
> - else
> - CSR_WRITE_2(sc, RL_TXSTART, RL_TXSTART_START);
> + if (sc->rl_type == RL_8169)
> + CSR_WRITE_2(sc, RL_GTXSTART, RL_TXSTART_START);
> + else
> + CSR_WRITE_2(sc, RL_TXSTART, RL_TXSTART_START);
>
> /*
> * Use the countdown timer for interrupt moderation.
> @@ -2059,12 +2063,13 @@
> * interrupt. Each time we write to the TIMERCNT register,
> * the timer count is reset to 0.
> */
> - CSR_WRITE_4(sc, RL_TIMERCNT, 1);
> + CSR_WRITE_4(sc, RL_TIMERCNT, 1);
>
> /*
> * Set a timeout in case the chip goes out to lunch.
> */
> - ifp->if_timer = 5;
> + ifp->if_timer = 5;
> + }
> }
>
> static void
>
>
> --
> // Theo Schlossnagle
> // Principal Engineer -- http://www.omniti.com/~jesus/
> // Postal Engine -- http://www.postalengine.com/
> // Ecelerity: fastest MTA on Earth
>
>
>
>
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