Date: Thu, 6 Jul 2006 23:15:51 GMT From: Bruce M Simpson <bms@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 100817 for review Message-ID: <200607062315.k66NFpr9059081@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=100817 Change 100817 by bms@bms_montagne on 2006/07/06 23:15:12 Bring in definitions and low level support code from the old MIPS branch. This stuff is going to be needed to get DDB up and running which should be first priority apart from a serial driver and locore. Affected files ... .. //depot/projects/mips2/src/sys/mips/include/_types.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/cache.h#1 add .. //depot/projects/mips2/src/sys/mips/include/cache_r4k.h#1 add .. //depot/projects/mips2/src/sys/mips/include/cpufunc.h#6 edit .. //depot/projects/mips2/src/sys/mips/include/cpuinfo.h#1 add .. //depot/projects/mips2/src/sys/mips/include/cpuregs.h#1 add .. //depot/projects/mips2/src/sys/mips/include/db_machdep.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/frame.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/kdb.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/locore.h#1 add .. //depot/projects/mips2/src/sys/mips/include/md_var.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/pcb.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/pcpu.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/pmap.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/pte.h#1 add .. //depot/projects/mips2/src/sys/mips/include/reg.h#2 edit .. //depot/projects/mips2/src/sys/mips/include/regnum.h#1 add .. //depot/projects/mips2/src/sys/mips/include/tlb.h#1 add .. //depot/projects/mips2/src/sys/mips/include/trap.h#2 edit .. //depot/projects/mips2/src/sys/mips/mips/cpu.c#1 add .. //depot/projects/mips2/src/sys/mips/mips/pmap.c#2 edit .. //depot/projects/mips2/src/sys/mips/mips/trap.c#2 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/include/_types.h#2 (text+ko) ==== ==== //depot/projects/mips2/src/sys/mips/include/cpufunc.h#6 (text+ko) ==== @@ -1,7 +1,5 @@ /*- - * Copyright (c) 2006 Olivier Houchard. - * Copyright (c) 1993 The Regents of the University of California. - * All rights reserved. + * Copyright (c) 2002-2004 Juli Mallett. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -11,14 +9,11 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) @@ -27,21 +22,39 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/include/cpufunc.h,v 1.148 2005/05/13 00:05:55 nectar Exp $ - */ - -/* - * Functions to provide access to special mips instructions. - * This in included in sys/systm.h, and that file should be - * used in preference to this. + * $FreeBSD$ */ #ifndef _MACHINE_CPUFUNC_H_ #define _MACHINE_CPUFUNC_H_ -static __inline register_t -intr_disable(void) +#ifdef _KERNEL + +#include <sys/types.h> +#include <machine/cpuregs.h> + +static __inline void +mips_barrier(void) +{ +<<<<<<< yours + __asm __volatile (".set noreorder\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + "nop\n\t" + ".set reorder\n\t" + : : : "memory"); +} + +static __inline void +mips_tlbp(void) { + __asm __volatile ("tlbp"); + mips_barrier(); register_t ret; #if 0 register_t tmp; @@ -55,11 +68,18 @@ } static __inline void -intr_enable(void) +mips_tlbr(void) +{ + __asm __volatile ("tlbr"); + mips_barrier(); +} + +static __inline void +mips_tlbwi(void) { + __asm __volatile ("tlbwi"); + mips_barrier(); #if 0 - register_t tmp; - __asm __volatile("mfc %0, $12\n" /* MIPS_COP_0_STATUS */ "or %0, %0, $1\n" /* MIPS_SR_INT_IE */ "mtc0 %0, $12\n" /* MIPS_COP_0_STATUS */ @@ -68,23 +88,116 @@ } static __inline void -intr_restore(register_t flag) +mips_tlbwr(void) { + __asm __volatile ("tlbwr"); + mips_barrier(); +} +static __inline void +mips_wbflush(void) +{ + __asm __volatile ("sync" : : : "memory"); + mips_barrier(); #if 0 __asm __volatile("mtc0 %0, $12\n" /* MIPS_COP_0_STATUS */ : : "r" (flag)); #endif } -/* - * XXXMIPS: - */ +#define MIPS_RDRW64_COP0(n,r) \ +static __inline u_int64_t \ +mips_rd_ ## n (void) \ +{ \ + int v0; \ + __asm __volatile ("dmfc0 %[v0], $"__XSTRING(r)";" \ + : [v0] "=&r"(v0)); \ + mips_barrier(); \ + return (v0); \ +} \ +static __inline void \ +mips_wr_ ## n (u_int64_t a0) \ +{ \ + __asm __volatile ("dmtc0 %[a0], $"__XSTRING(r)";" \ + __XSTRING(COP0_SYNC)";" \ + "nop;" \ + "nop;" \ + : \ + : [a0] "r"(a0)); \ + mips_barrier(); \ +} struct __hack + +MIPS_RDRW64_COP0(entrylo0, MIPS_COP_0_TLB_LO0); +MIPS_RDRW64_COP0(entrylo1, MIPS_COP_0_TLB_LO1); +MIPS_RDRW64_COP0(entryhi, MIPS_COP_0_TLB_HI); +MIPS_RDRW64_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); +MIPS_RDRW64_COP0(xcontext, MIPS_COP_0_TLB_XCONTEXT); + +#undef MIPS_RDRW64_COP0 + +#define MIPS_RDRW32_COP0(n,r) \ +static __inline u_int32_t \ +mips_rd_ ## n (void) \ +{ \ + int v0; \ + __asm __volatile ("mfc0 %[v0], $"__XSTRING(r)";" \ + : [v0] "=&r"(v0)); \ + mips_barrier(); \ + return (v0); \ +} \ +static __inline void \ +mips_wr_ ## n (u_int32_t a0) \ +{ \ + __asm __volatile ("mtc0 %[a0], $"__XSTRING(r)";" \ + __XSTRING(COP0_SYNC)";" \ + "nop;" \ + "nop;" \ + : \ + : [a0] "r"(a0)); \ + mips_barrier(); \ +} struct __hack + +MIPS_RDRW32_COP0(compare, MIPS_COP_0_COMPARE); +MIPS_RDRW32_COP0(config, MIPS_COP_0_CONFIG); +MIPS_RDRW32_COP0(count, MIPS_COP_0_COUNT); +MIPS_RDRW32_COP0(index, MIPS_COP_0_TLB_INDEX); +MIPS_RDRW32_COP0(wired, MIPS_COP_0_TLB_WIRED); +MIPS_RDRW32_COP0(cause, MIPS_COP_0_CAUSE); +MIPS_RDRW32_COP0(status, MIPS_COP_0_STATUS); + +#undef MIPS_RDRW32_COP0 + +static __inline register_t +intr_disable(void) +{ + register_t s; + + s = mips_rd_status(); + mips_wr_status(s & ~MIPS_SR_IE); + + return (s); +} + +#define intr_restore(s) mips_wr_status((s)) + static __inline void breakpoint(void) { - __asm __volatile("break"); + __asm __volatile ("break"); +} + +static __inline void +mips_read_membar(void) +{ + /* Nil */ +} + +static __inline void +mips_write_membar(void) +{ + mips_wbflush(); } +#endif /* _KERNEL */ #endif /* !_MACHINE_CPUFUNC_H_ */ ==== //depot/projects/mips2/src/sys/mips/include/db_machdep.h#2 (text+ko) ==== @@ -1,94 +1,115 @@ -/*- - * Mach Operating System - * Copyright (c) 1991,1990 Carnegie Mellon University - * All Rights Reserved. +/* $NetBSD: db_machdep.h,v 1.14 2002/03/05 14:12:29 simonb Exp $ */ + +/* + * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author) + * All rights reserved. * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Jonathan Stone for + * the NetBSD Project. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - * - * $FreeBSD: src/sys/amd64/include/db_machdep.h,v 1.22 2005/01/05 20:17:20 imp Exp $ + * $FreeBSD$ */ +#ifndef _MIPS_DB_MACHDEP_H_ +#define _MIPS_DB_MACHDEP_H_ -#ifndef _MACHINE_DB_MACHDEP_H_ -#define _MACHINE_DB_MACHDEP_H_ - #include <machine/frame.h> #include <machine/trap.h> +#include <machine/reg.h> /* register state */ +#include <machine/regnum.h> /* symbolic register indices */ -typedef vm_offset_t db_addr_t; /* address - unsigned */ + +#if 0 +typedef unsigned long db_addr_t; /* address - unsigned */ typedef long db_expr_t; /* expression - signed */ +#else +typedef unsigned int db_addr_t; /* address - unsigned */ +typedef int db_expr_t; /* expression - signed */ +#endif + +typedef struct frame db_regs_t; + +extern db_regs_t ddb_regs; /* register state */ + +#define PC_REGS() ((db_addr_t)ddb_regs.f_regs[PC]) + +#define PC_ADVANCE() do { \ + if ((db_get_value(ddb_regs.f_regs[PC], sizeof(int), FALSE) & \ + 0xfc00003f) == 0xd) \ + ddb_regs.f_regs[PC] += BKPT_SIZE; \ +} while(0) -#define PC_REGS() ((db_addr_t)kdb_thrctx->pcb_rip) +/* Similar to PC_ADVANCE(), except only advance on cpu_Debugger()'s bpt */ +#define PC_BREAK_ADVANCE() do { \ + if (db_get_value(ddb_regs.f_regs[PC], sizeof(int), FALSE) == 0xd) \ + ddb_regs.f_regs[PC] += BKPT_SIZE; \ +} while(0) -#define BKPT_INST 0xcc /* breakpoint instruction */ -#define BKPT_SIZE (1) /* size of breakpoint inst */ +#define BKPT_INST 0x0001000D +#define BKPT_SIZE (4) /* size of breakpoint inst */ #define BKPT_SET(inst) (BKPT_INST) -#define BKPT_SKIP \ -do { \ - kdb_frame->tf_rip += 1; \ - kdb_thrctx->pcb_rip += 1; \ -} while(0) +#define IS_BREAKPOINT_TRAP(type, code) ((type) == TrBp) +#define IS_WATCHPOINT_TRAP(type, code) (0) /* XXX mips3 watchpoint */ + +/* + * Interface to disassembly (shared with mdb) + */ +db_addr_t db_disasm_insn(int insn, db_addr_t loc, boolean_t altfmt); + -#define FIXUP_PC_AFTER_BREAK \ -do { \ - kdb_frame->tf_rip -= 1; \ - kdb_thrctx->pcb_rip -= 1; \ -} while(0); +/* + * Entrypoints to DDB for kernel, keyboard drivers, init hook + */ +void kdb_kbd_trap(db_regs_t *); +void db_set_ddb_regs(int type, struct trapframe *); +int kdbpeek(db_addr_t); -#define db_clear_single_step kdb_cpu_clear_singlestep -#define db_set_single_step kdb_cpu_set_singlestep +#define DB_SMALL_VALUE_MAX (0x7fffffff) +#define DB_SMALL_VALUE_MIN (-0x40001) -#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BPTFLT) /* - * Watchpoints are not supported. The debug exception type is in %dr6 - * and not yet in the args to this macro. + * MIPS cpus have no hardware single-step. */ -#define IS_WATCHPOINT_TRAP(type, code) 0 +#define SOFTWARE_SSTEP -#define I_CALL 0xe8 -#define I_CALLI 0xff -#define I_RET 0xc3 -#define I_IRET 0xcf +#define inst_trap_return(ins) ((ins)&0) -#define inst_trap_return(ins) (((ins)&0xff) == I_IRET) -#define inst_return(ins) (((ins)&0xff) == I_RET) -#define inst_call(ins) (((ins)&0xff) == I_CALL || \ - (((ins)&0xff) == I_CALLI && \ - ((ins)&0x3800) == 0x1000)) -#define inst_load(ins) 0 -#define inst_store(ins) 0 +boolean_t inst_branch(int inst); +boolean_t inst_call(int inst); +boolean_t inst_return(int inst); +boolean_t inst_load(int inst); +boolean_t inst_store(int inst); +boolean_t inst_unconditional_flow_transfer(int inst); +db_addr_t branch_taken(int inst, db_addr_t pc); +db_addr_t next_instr_address(db_addr_t pc, boolean_t bd); /* - * There no interesting addresses below _kstack = 0xefbfe000. There - * are small absolute values for GUPROF, but we don't want to see them. - * Treat "negative" addresses below _kstack as non-small to allow for - * future reductions of _kstack and to avoid sign extension problems. - * - * There is one interesting symbol above -db_maxoff = 0xffff0000, - * namely _APTD = 0xfffff000. Accepting this would mess up the - * printing of small negative offsets. The next largest symbol is - * _APTmap = 0xffc00000. Accepting this is OK (unless db_maxoff is - * set to >= 0x400000 - (max stack offset)). + * We have machine-dependent commands. */ -#define DB_SMALL_VALUE_MAX 0x7fffffff -#define DB_SMALL_VALUE_MIN (-0x400001) +#define DB_MACHINE_COMMANDS -#endif /* !_MACHINE_DB_MACHDEP_H_ */ +#endif /* _MIPS_DB_MACHDEP_H_ */ ==== //depot/projects/mips2/src/sys/mips/include/frame.h#2 (text+ko) ==== @@ -1,10 +1,5 @@ /*- - * Copyright (c) 2003 Peter Wemm. - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. + * Copyright (c) 2002-2004 Juli Mallett. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -14,14 +9,11 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) @@ -30,50 +22,63 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * from: @(#)frame.h 5.2 (Berkeley) 1/18/91 - * $FreeBSD: src/sys/amd64/include/frame.h,v 1.30 2005/12/22 22:16:05 jhb Exp $ + * $FreeBSD$ */ -#ifndef _MACHINE_FRAME_H_ -#define _MACHINE_FRAME_H_ 1 +#ifndef _MACHINE_FRAME_H_ +#define _MACHINE_FRAME_H_ + +#include <machine/regnum.h> /* - * System stack frames. + * trapframe argument passed to trap() */ -/* - * Exception/Trap Stack Frame - * - * The ordering of this is specifically so that we can take first 6 - * the syscall arguments directly from the beginning of the frame. - */ +#define TF_AST 0 +#define TF_V0 1 +#define TF_V1 2 +#define TF_A0 3 +#define TF_A1 4 +#define TF_A2 5 +#define TF_A3 6 +#define TF_T0 7 +#define TF_T1 8 +#define TF_T2 9 +#define TF_T3 10 + +#define TF_A4 11 +#define TF_A5 12 +#define TF_A6 13 +#define TF_A7 14 + +#define TF_TA0 11 +#define TF_TA1 12 +#define TF_TA2 13 +#define TF_TA3 14 + +#define TF_T8 15 +#define TF_T9 16 + +#define TF_RA 17 +#define TF_SR 18 +#define TF_MULLO 19 +#define TF_MULHI 20 +#define TF_EPC 21 /* may be changed by trap() call */ + +#define TF_SP 22 + +#define TF_NREGS 23 struct trapframe { - register_t tf_rdi; - register_t tf_rsi; - register_t tf_rdx; - register_t tf_rcx; - register_t tf_r8; - register_t tf_r9; - register_t tf_rax; - register_t tf_rbx; - register_t tf_rbp; - register_t tf_r10; - register_t tf_r11; - register_t tf_r12; - register_t tf_r13; - register_t tf_r14; - register_t tf_r15; - register_t tf_trapno; - register_t tf_addr; - register_t tf_flags; - /* below portion defined in hardware */ - register_t tf_err; - register_t tf_rip; - register_t tf_cs; - register_t tf_rflags; - register_t tf_rsp; - register_t tf_ss; + __register_t tf_regs[TF_NREGS]; + u_int32_t tf_ppl; /* previous priority level */ + int32_t tf_pad; /* for 8 byte aligned */ +}; + +struct frame { + __register_t f_regs[38]; + u_int32_t f_ppl; /* previous priority level */ + int32_t f_pad; /* for 8 byte aligned */ }; -#endif /* _MACHINE_FRAME_H_ */ +#endif /* !_MACHINE_FRAME_H_ */ ==== //depot/projects/mips2/src/sys/mips/include/kdb.h#2 (text+ko) ==== @@ -23,31 +23,26 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/include/kdb.h,v 1.3 2006/04/03 22:51:46 marcel Exp $ + * $FreeBSD: src/sys/alpha/include/kdb.h,v 1.2 2005/01/05 20:05:50 imp Exp $ */ #ifndef _MACHINE_KDB_H_ #define _MACHINE_KDB_H_ #include <machine/frame.h> -#include <machine/psl.h> - -#define KDB_STOPPEDPCB(pc) &stoppcbs[pc->pc_cpuid] static __inline void kdb_cpu_clear_singlestep(void) { - kdb_frame->tf_rflags &= ~PSL_T; } static __inline void kdb_cpu_set_singlestep(void) { - kdb_frame->tf_rflags |= PSL_T; } static __inline void -kdb_cpu_trap(int type, int code) +kdb_cpu_trap(int vector, int _) { } ==== //depot/projects/mips2/src/sys/mips/include/md_var.h#2 (text+ko) ==== @@ -1,6 +1,5 @@ /*- - * Copyright (c) 1995 Bruce D. Evans. - * All rights reserved. + * Copyright (c) 2003-2004 Juli Mallett. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -10,9 +9,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE @@ -26,60 +22,25 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/include/md_var.h,v 1.77 2006/04/21 04:24:50 peter Exp $ + * $FreeBSD$ */ #ifndef _MACHINE_MD_VAR_H_ #define _MACHINE_MD_VAR_H_ -/* - * Miscellaneous machine-dependent declarations. - */ +extern vm_offset_t kstack0; +extern vm_paddr_t kstack0_phys; -extern long Maxmem; -extern u_int basemem; -extern int busdma_swi_pending; -extern u_int cpu_exthigh; -extern u_int cpu_feature; -extern u_int cpu_feature2; -extern u_int amd_feature; -extern u_int amd_feature2; -extern u_int cpu_fxsr; -extern u_int cpu_high; -extern u_int cpu_id; -extern u_int cpu_procinfo; -extern u_int cpu_procinfo2; -extern char cpu_vendor[]; -extern char kstack[]; -extern char sigcode[]; -extern int szsigcode; -extern uint64_t *vm_page_dump; -extern int vm_page_dump_size; +extern int mips_num_tlb_entries; -extern struct pcpu __pcpu[]; +extern int cpu_id; +extern int fpu_id; -typedef void alias_for_inthand_t(u_int cs, u_int ef, u_int esp, u_int ss); -struct thread; -struct reg; -struct fpreg; -struct dbreg; -struct dumperinfo; +void cpu_identify(void); +void mips_cpu_init(void); +void mips_init(void); -void busdma_swi(void); -void cpu_setregs(void); -void doreti_iret(void) __asm(__STRING(doreti_iret)); -void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault)); -void dump_add_page(vm_paddr_t); -void dump_drop_page(vm_paddr_t); -void initializecpu(void); -void fillw(int /*u_short*/ pat, void *base, size_t cnt); -void fpstate_drop(struct thread *td); -int is_physical_memory(vm_paddr_t addr); -int isa_nmi(int cd); -void pagecopy(void *from, void *to); -void pagezero(void *addr); -void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist); -int user_dbreg_trap(void); -void minidumpsys(struct dumperinfo *); +/* Platform call-downs. */ +void platform_identify(void); #endif /* !_MACHINE_MD_VAR_H_ */ ==== //depot/projects/mips2/src/sys/mips/include/pcb.h#2 (text+ko) ==== @@ -1,10 +1,5 @@ /*- - * Copyright (c) 2003 Peter Wemm. - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. + * Copyright (c) 2003-2005 Juli Mallett. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -14,14 +9,11 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) @@ -30,56 +22,39 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * from: @(#)pcb.h 5.10 (Berkeley) 5/12/91 - * $FreeBSD: src/sys/amd64/include/pcb.h,v 1.62 2005/09/27 21:11:35 peter Exp $ + * $FreeBSD$ */ -#ifndef _AMD64_PCB_H_ -#define _AMD64_PCB_H_ +#ifndef _MACHINE_PCB_H_ +#define _MACHINE_PCB_H_ + +#include <machine/reg.h> /* - * AMD64 process control block + * Process Control Block. */ -#include <machine/fpu.h> - struct pcb { - register_t pcb_cr3; - register_t pcb_r15; - register_t pcb_r14; - register_t pcb_r13; - register_t pcb_r12; - register_t pcb_rbp; - register_t pcb_rsp; - register_t pcb_rbx; - register_t pcb_rip; - register_t pcb_fsbase; - register_t pcb_gsbase; - u_int32_t pcb_ds; - u_int32_t pcb_es; - u_int32_t pcb_fs; - u_int32_t pcb_gs; - u_int64_t pcb_dr0; - u_int64_t pcb_dr1; - u_int64_t pcb_dr2; - u_int64_t pcb_dr3; - u_int64_t pcb_dr6; - u_int64_t pcb_dr7; + __register_t pcb_regs[12]; +}; - struct savefpu pcb_save; - u_long pcb_flags; -#define PCB_DBREGS 0x02 /* process using debug registers */ -#define PCB_FPUINITDONE 0x08 /* fpu state is initialized */ -#define PCB_32BIT 0x40 /* process has 32 bit context (segs etc) */ -#define PCB_FULLCTX 0x80 /* full context restore on sysret */ +#define PCB_REG_S0 (0) +#define PCB_REG_S1 (1) +#define PCB_REG_S2 (2) +#define PCB_REG_S3 (3) +#define PCB_REG_S4 (4) +#define PCB_REG_S5 (5) +#define PCB_REG_S6 (6) +#define PCB_REG_S7 (7) +#define PCB_REG_S8 (8) +#define PCB_REG_SP (9) +#define PCB_REG_SR (10) +#define PCB_REG_RA (11) - caddr_t pcb_onfault; /* copyin/out fault recovery */ -}; - #ifdef _KERNEL -struct trapframe; +#define PCB_FSR(pcb) (0) void makectx(struct trapframe *, struct pcb *); -void savectx(struct pcb *); +int savectx(struct pcb *pcb); #endif -#endif /* _AMD64_PCB_H_ */ +#endif /* !_MACHINE_PCB_H_ */ ==== //depot/projects/mips2/src/sys/mips/include/pcpu.h#2 (text+ko) ==== @@ -1,4 +1,6 @@ /*- + * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org> + * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org> * Copyright (c) Peter Wemm <peter@netplex.com.au> * All rights reserved. * @@ -23,161 +25,27 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/include/pcpu.h,v 1.44 2005/03/11 22:16:09 peter Exp $ + * $FreeBSD$ */ -#ifndef _MACHINE_PCPU_H_ -#define _MACHINE_PCPU_H_ - -#ifndef _SYS_CDEFS_H_ -#error this file needs sys/cdefs.h as a prerequisite -#endif +#ifndef _MACHINE_PCPU_H_ +#define _MACHINE_PCPU_H_ #ifdef _KERNEL +#include <machine/cpufunc.h> -/* - * The SMP parts are setup in pmap.c and locore.s for the BSP, and - * mp_machdep.c sets up the data for the AP's to "see" when they awake. - * The reason for doing it via a struct is so that an array of pointers - * to each CPU's data can be set up for things like "check curproc on all - * other processors" - */ #define PCPU_MD_FIELDS \ - struct pcpu *pc_prvspace; /* Self-reference */ \ - struct pmap *pc_curpmap; \ - struct amd64tss *pc_tssp; \ - register_t pc_rsp0; \ - register_t pc_scratch_rsp; /* User %rsp in syscall */ \ - u_int pc_apic_id; \ - u_int pc_acpi_id /* ACPI CPU id */ + u_char pc_next_asid; /* next ASID to alloc */ \ + u_int pc_current_asidgen; /* ASID rollover check */ -#if defined(lint) - -extern struct pcpu *pcpup; - -#define PCPU_GET(member) (pcpup->pc_ ## member) -#define PCPU_PTR(member) (&pcpup->pc_ ## member) -#define PCPU_SET(member,value) (pcpup->pc_ ## member = (value)) - -#elif defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF) \ - && defined(__GNUCLIKE___OFFSETOF) +#define PCPUP (pcpup) -/* - * Evaluates to the byte offset of the per-cpu variable name. - */ -#define __pcpu_offset(name) \ - __offsetof(struct pcpu, name) +#define PCPU_GET(member) (PCPUP->pc_ ## member) +#define PCPU_PTR(member) (&PCPUP->pc_ ## member) +#define PCPU_SET(member,value) (PCPUP->pc_ ## member = (value)) -/* - * Evaluates to the type of the per-cpu variable name. - */ -#define __pcpu_type(name) \ - __typeof(((struct pcpu *)0)->name) - -/* - * Evaluates to the address of the per-cpu variable name. - */ -#define __PCPU_PTR(name) __extension__ ({ \ - __pcpu_type(name) *__p; \ - \ - __asm __volatile("movq %%gs:%1,%0; addq %2,%0" \ - : "=r" (__p) \ - : "m" (*(struct pcpu *)(__pcpu_offset(pc_prvspace))), \ - "i" (__pcpu_offset(name))); \ - \ - __p; \ -}) - -/* - * Evaluates to the value of the per-cpu variable name. - */ -#define __PCPU_GET(name) __extension__ ({ \ - __pcpu_type(name) __result; \ - \ - if (sizeof(__result) == 1) { \ - u_char __b; \ - __asm __volatile("movb %%gs:%1,%0" \ - : "=r" (__b) \ - : "m" (*(u_char *)(__pcpu_offset(name)))); \ - __result = *(__pcpu_type(name) *)&__b; \ - } else if (sizeof(__result) == 2) { \ - u_short __w; \ - __asm __volatile("movw %%gs:%1,%0" \ - : "=r" (__w) \ - : "m" (*(u_short *)(__pcpu_offset(name)))); \ - __result = *(__pcpu_type(name) *)&__w; \ - } else if (sizeof(__result) == 4) { \ - u_int __i; \ - __asm __volatile("movl %%gs:%1,%0" \ - : "=r" (__i) \ - : "m" (*(u_int *)(__pcpu_offset(name)))); \ - __result = *(__pcpu_type(name) *)&__i; \ - } else if (sizeof(__result) == 8) { \ - u_long __l; \ - __asm __volatile("movq %%gs:%1,%0" \ - : "=r" (__l) \ - : "m" (*(u_long *)(__pcpu_offset(name)))); \ - __result = *(__pcpu_type(name) *)&__l; \ - } else { \ - __result = *__PCPU_PTR(name); \ - } \ - \ - __result; \ -}) - -/* - * Sets the value of the per-cpu variable name to value val. - */ -#define __PCPU_SET(name, val) { \ - __pcpu_type(name) __val = (val); \ - \ - if (sizeof(__val) == 1) { \ - u_char __b; \ - __b = *(u_char *)&__val; \ - __asm __volatile("movb %1,%%gs:%0" \ - : "=m" (*(u_char *)(__pcpu_offset(name))) \ - : "r" (__b)); \ - } else if (sizeof(__val) == 2) { \ - u_short __w; \ - __w = *(u_short *)&__val; \ - __asm __volatile("movw %1,%%gs:%0" \ - : "=m" (*(u_short *)(__pcpu_offset(name))) \ - : "r" (__w)); \ - } else if (sizeof(__val) == 4) { \ - u_int __i; \ - __i = *(u_int *)&__val; \ - __asm __volatile("movl %1,%%gs:%0" \ - : "=m" (*(u_int *)(__pcpu_offset(name))) \ - : "r" (__i)); \ - } else if (sizeof(__val) == 8) { \ - u_long __l; \ - __l = *(u_long *)&__val; \ - __asm __volatile("movq %1,%%gs:%0" \ - : "=m" (*(u_long *)(__pcpu_offset(name))) \ - : "r" (__l)); \ - } else { \ - *__PCPU_PTR(name) = __val; \ - } \ -} +extern struct pcpu *pcpup; -#define PCPU_GET(member) __PCPU_GET(pc_ ## member) -#define PCPU_PTR(member) __PCPU_PTR(pc_ ## member) -#define PCPU_SET(member, val) __PCPU_SET(pc_ ## member, val) - -static __inline struct thread * -__curthread(void) -{ - struct thread *td; - - __asm __volatile("movq %%gs:0,%0" : "=r" (td)); - return (td); -} -#define curthread (__curthread()) - >>> TRUNCATED FOR MAIL (1000 lines) <<<
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200607062315.k66NFpr9059081>