Date: Tue, 30 Aug 2011 17:20:35 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r225268 - stable/8/sys/dev/alc Message-ID: <201108301720.p7UHKZHH060316@svn.freebsd.org>
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Author: yongari Date: Tue Aug 30 17:20:34 2011 New Revision: 225268 URL: http://svn.freebsd.org/changeset/base/225268 Log: MFC r225088: Disable PHY hibernation until I get more detailed hibernation programming secret. The PHY would go into sleep state when it detects no established link and it will re-establish link when the cable is plugged in. Previously it failed to re-establish link when the cable is plugged in such that it required to manually down and up the interface again to make it work. This came from incorrectly programmed hibernation parameters. According to Atheros, each PHY chip requires different configuration for hibernation and different vendor has different settings for the same chip. Disabling hibernation may consume more power but establishing link looks more important than saving power. Special thanks to Atheros for giving me instructions that disable hibernation. PR: kern/148772 Modified: stable/8/sys/dev/alc/if_alc.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/dev/alc/if_alc.c ============================================================================== --- stable/8/sys/dev/alc/if_alc.c Tue Aug 30 16:52:25 2011 (r225267) +++ stable/8/sys/dev/alc/if_alc.c Tue Aug 30 17:20:34 2011 (r225268) @@ -534,13 +534,11 @@ alc_phy_reset(struct alc_softc *sc) uint16_t data; /* Reset magic from Linux. */ - CSR_WRITE_2(sc, ALC_GPHY_CFG, - GPHY_CFG_HIB_EN | GPHY_CFG_HIB_PULSE | GPHY_CFG_SEL_ANA_RESET); + CSR_WRITE_2(sc, ALC_GPHY_CFG, GPHY_CFG_SEL_ANA_RESET); CSR_READ_2(sc, ALC_GPHY_CFG); DELAY(10 * 1000); - CSR_WRITE_2(sc, ALC_GPHY_CFG, - GPHY_CFG_EXT_RESET | GPHY_CFG_HIB_EN | GPHY_CFG_HIB_PULSE | + CSR_WRITE_2(sc, ALC_GPHY_CFG, GPHY_CFG_EXT_RESET | GPHY_CFG_SEL_ANA_RESET); CSR_READ_2(sc, ALC_GPHY_CFG); DELAY(10 * 1000); @@ -625,6 +623,23 @@ alc_phy_reset(struct alc_softc *sc) alc_miibus_writereg(sc->alc_dev, sc->alc_phyaddr, ALC_MII_DBG_DATA, data); DELAY(1000); + + /* Disable hibernation. */ + alc_miibus_writereg(sc->alc_dev, sc->alc_phyaddr, ALC_MII_DBG_ADDR, + 0x0029); + data = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr, + ALC_MII_DBG_DATA); + data &= ~0x8000; + alc_miibus_writereg(sc->alc_dev, sc->alc_phyaddr, ALC_MII_DBG_DATA, + data); + + alc_miibus_writereg(sc->alc_dev, sc->alc_phyaddr, ALC_MII_DBG_ADDR, + 0x000B); + data = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr, + ALC_MII_DBG_DATA); + data &= ~0x8000; + alc_miibus_writereg(sc->alc_dev, sc->alc_phyaddr, ALC_MII_DBG_DATA, + data); } static void @@ -650,8 +665,7 @@ alc_phy_down(struct alc_softc *sc) break; default: /* Force PHY down. */ - CSR_WRITE_2(sc, ALC_GPHY_CFG, - GPHY_CFG_EXT_RESET | GPHY_CFG_HIB_EN | GPHY_CFG_HIB_PULSE | + CSR_WRITE_2(sc, ALC_GPHY_CFG, GPHY_CFG_EXT_RESET | GPHY_CFG_SEL_ANA_RESET | GPHY_CFG_PHY_IDDQ | GPHY_CFG_PWDOWN_HW); DELAY(1000);
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