Date: Thu, 5 Sep 2024 04:32:02 +0300 From: Konstantin Belousov <kostikbel@gmail.com> To: Cy Schubert <Cy.Schubert@cschubert.com> Cc: src-committers@freebsd.org, dev-commits-src-all@freebsd.org, dev-commits-src-main@freebsd.org Subject: Re: git: 65b133e5d292 - main - x86: allow to have more than one kind of IOMMU Message-ID: <ZtkKErhgQskvSrXT@kib.kiev.ua> In-Reply-To: <20240905010600.B9D292A@slippy.cwsent.com> References: <202409042150.484LoeAq031493@gitrepo.freebsd.org> <20240904235204.1FCD9C5@slippy.cwsent.com> <Ztj9XU2ETM9gKP7r@kib.kiev.ua> <20240905010600.B9D292A@slippy.cwsent.com>
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On Wed, Sep 04, 2024 at 06:06:00PM -0700, Cy Schubert wrote: > ??() at 0/frame 0xffffffff81f058e0 > acpi_pci_get_dma_tag() at acpi_pci_get_dma_tag+0x34/frame 0xffffffff81f05900 One more method is needed. Updated patch is below. commit 99e3d96fc1a2b1d5cac5a635608ec3044ec4fa13 Author: Konstantin Belousov <kib@FreeBSD.org> Date: Thu Sep 5 03:33:34 2024 +0300 x86: always provide dummy x86_iommu virtual methods to make configurations where vendor-specific IOMMU not yet implemented but IOMMU is enabled in config, work when calling into MSI/IOAPIC interrupt remapping. Reported by: cy Sponsored by: Advanced Micro Devices (AMD) Sponsored by: The FreeBSD Foundation MFC after: 1 week diff --git a/sys/x86/iommu/iommu_utils.c b/sys/x86/iommu/iommu_utils.c index 2c647fd21c67..2011c632f770 100644 --- a/sys/x86/iommu/iommu_utils.c +++ b/sys/x86/iommu/iommu_utils.c @@ -190,12 +190,60 @@ SYSCTL_INT(_hw_iommu, OID_AUTO, batch_coalesce, CTLFLAG_RWTUN, &iommu_qi_batch_coalesce, 0, "Number of qi batches between interrupt"); -static struct x86_iommu *x86_iommu; +static struct iommu_unit * +x86_no_iommu_find(device_t dev, bool verbose) +{ + return (NULL); +} + +static int +x86_no_iommu_alloc_msi_intr(device_t src, u_int *cookies, u_int count) +{ + return (EOPNOTSUPP); +} + +static int +x86_no_iommu_map_msi_intr(device_t src, u_int cpu, u_int vector, + u_int cookie, uint64_t *addr, uint32_t *data) +{ + return (EOPNOTSUPP); +} + +static int +x86_no_iommu_unmap_msi_intr(device_t src, u_int cookie) +{ + return (0); +} + +static int +x86_no_iommu_map_ioapic_intr(u_int ioapic_id, u_int cpu, u_int vector, + bool edge, bool activehi, int irq, u_int *cookie, uint32_t *hi, + uint32_t *lo) +{ + return (EOPNOTSUPP); +} + +static int +x86_no_iommu_unmap_ioapic_intr(u_int ioapic_id, u_int *cookie) +{ + return (0); +} + +static struct x86_iommu x86_no_iommu = { + .find = x86_no_iommu_find, + .alloc_msi_intr = x86_no_iommu_alloc_msi_intr, + .map_msi_intr = x86_no_iommu_map_msi_intr, + .unmap_msi_intr = x86_no_iommu_unmap_msi_intr, + .map_ioapic_intr = x86_no_iommu_map_ioapic_intr, + .unmap_ioapic_intr = x86_no_iommu_unmap_ioapic_intr, +}; + +static struct x86_iommu *x86_iommu = &x86_no_iommu; void set_x86_iommu(struct x86_iommu *x) { - MPASS(x86_iommu == NULL); + MPASS(x86_iommu == &x86_no_iommu); x86_iommu = x; }
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