Date: Thu, 18 Jan 2024 23:39:12 GMT From: John Baldwin <jhb@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: b5d2a06b2c4f - stable/14 - pci_cfgreg: Add shims to preserve ABI of pci_cfgreg(read|write) Message-ID: <202401182339.40INdCdk011393@gitrepo.freebsd.org>
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The branch stable/14 has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=b5d2a06b2c4f50fd20774928602a3b5f0f27b127 commit b5d2a06b2c4f50fd20774928602a3b5f0f27b127 Author: John Baldwin <jhb@FreeBSD.org> AuthorDate: 2024-01-18 23:19:11 +0000 Commit: John Baldwin <jhb@FreeBSD.org> CommitDate: 2024-01-18 23:19:11 +0000 pci_cfgreg: Add shims to preserve ABI of pci_cfgreg(read|write) This is a direct commit to stable/14 to preserve the ABI of the the pci_cfgregread and pci_cfgregwrite functions. The new routines are renamed to add a _domain suffix and macros map the new API to the new functions. Note: No API compatibility has been provided as modules in ports should not be using this internal API (normal PCI drivers use pci_read_config and pci_write_config with a device_t). --- sys/amd64/pci/pci_cfgreg.c | 27 ++++++++++++++++++++++++--- sys/arm64/acpica/pci_cfgreg.c | 27 ++++++++++++++++++++++++--- sys/arm64/include/pci_cfgreg.h | 7 +++++-- sys/i386/pci/pci_cfgreg.c | 20 ++++++++++++++++++++ sys/x86/include/pci_cfgreg.h | 7 +++++-- 5 files changed, 78 insertions(+), 10 deletions(-) diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index 5218ff3a40f7..6b95c6fae0ab 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -95,7 +95,8 @@ pci_docfgregread(int domain, int bus, int slot, int func, int reg, int bytes) * Read configuration space register */ u_int32_t -pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes) +pci_cfgregread_domain(int domain, int bus, int slot, int func, int reg, + int bytes) { uint32_t line; @@ -121,8 +122,8 @@ pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes) * Write configuration space register */ void -pci_cfgregwrite(int domain, int bus, int slot, int func, int reg, uint32_t data, - int bytes) +pci_cfgregwrite_domain(int domain, int bus, int slot, int func, int reg, + uint32_t data, int bytes) { if (domain == 0 && bus == 0 && (1 << slot & pcie_badslots) != 0) { pcireg_cfgwrite(bus, slot, func, reg, data, bytes); @@ -333,3 +334,23 @@ pciereg_cfgwrite(int domain, int bus, unsigned slot, unsigned func, break; } } + +/* ABI compatibility shims. */ +#undef pci_cfgregread +#undef pci_cfgregwrite + +u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes); +void pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, + int bytes); + +u_int32_t +pci_cfgregread(int bus, int slot, int func, int reg, int bytes) +{ + return (pci_cfgregread_domain(0, bus, slot, func, reg, bytes)); +} + +void +pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, int bytes) +{ + return (pci_cfgregwrite_domain(0, bus, slot, func, reg, data, bytes)); +} diff --git a/sys/arm64/acpica/pci_cfgreg.c b/sys/arm64/acpica/pci_cfgreg.c index 55627d4abfaf..3b38be05beb5 100644 --- a/sys/arm64/acpica/pci_cfgreg.c +++ b/sys/arm64/acpica/pci_cfgreg.c @@ -41,7 +41,8 @@ * Read configuration space register */ uint32_t -pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes) +pci_cfgregread_domain(int domain, int bus, int slot, int func, int reg, + int bytes) { /* ARM64TODO */ @@ -53,8 +54,8 @@ pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes) * Write configuration space register */ void -pci_cfgregwrite(int domain, int bus, int slot, int func, int reg, uint32_t data, - int bytes) +pci_cfgregwrite_domain(int domain, int bus, int slot, int func, int reg, + uint32_t data, int bytes) { /* ARM64TODO */ @@ -72,3 +73,23 @@ pci_cfgregopen(void) panic("pci_cfgregopen not implemented"); return (0); } + +/* ABI compatibility shims. */ +#undef pci_cfgregread +#undef pci_cfgregwrite + +uint32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes); +void pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, + int bytes); + +uint32_t +pci_cfgregread(int bus, int slot, int func, int reg, int bytes) +{ + return (pci_cfgregread_domain(0, bus, slot, func, reg, bytes)); +} + +void +pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, int bytes) +{ + return (pci_cfgregwrite_domain(0, bus, slot, func, reg, data, bytes)); +} diff --git a/sys/arm64/include/pci_cfgreg.h b/sys/arm64/include/pci_cfgreg.h index 579dcd954c9b..cce7e6bd8961 100644 --- a/sys/arm64/include/pci_cfgreg.h +++ b/sys/arm64/include/pci_cfgreg.h @@ -27,7 +27,10 @@ #define _MACHINE_PCI_CFGREG_H int pci_cfgregopen(void); -uint32_t pci_cfgregread(int, int, int, int, int, int); -void pci_cfgregwrite(int, int, int, int, int, uint32_t, int); +uint32_t pci_cfgregread_domain(int, int, int, int, int, int); +void pci_cfgregwrite_domain(int, int, int, int, int, uint32_t, int); + +#define pci_cfgregread pci_cfgregread_domain +#define pci_cfgregwrite pci_cfgregwrite_domain #endif /* !_MACHINE_PCI_CFGREG_H */ diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index a512e3ea2c66..ef712fe49fe3 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -640,3 +640,23 @@ pciereg_cfgwrite(int domain, int bus, unsigned slot, unsigned func, critical_exit(); } + +/* ABI compatibility shims. */ +#undef pci_cfgregread +#undef pci_cfgregwrite + +u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes); +void pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, + int bytes); + +u_int32_t +pci_cfgregread(int bus, int slot, int func, int reg, int bytes) +{ + return (pci_cfgregread_domain(0, bus, slot, func, reg, bytes)); +} + +void +pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, int bytes) +{ + return (pci_cfgregwrite_domain(0, bus, slot, func, reg, data, bytes)); +} diff --git a/sys/x86/include/pci_cfgreg.h b/sys/x86/include/pci_cfgreg.h index 370113b9d7bd..680a4551af07 100644 --- a/sys/x86/include/pci_cfgreg.h +++ b/sys/x86/include/pci_cfgreg.h @@ -58,12 +58,15 @@ extern int cfgmech; rman_res_t hostb_alloc_start(int type, rman_res_t start, rman_res_t end, rman_res_t count); int pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus); int pci_cfgregopen(void); -u_int32_t pci_cfgregread(int domain, int bus, int slot, int func, int reg, int bytes); -void pci_cfgregwrite(int domain, int bus, int slot, int func, int reg, u_int32_t data, int bytes); +u_int32_t pci_cfgregread_domain(int domain, int bus, int slot, int func, int reg, int bytes); +void pci_cfgregwrite_domain(int domain, int bus, int slot, int func, int reg, u_int32_t data, int bytes); #ifdef __HAVE_PIR void pci_pir_open(void); int pci_pir_probe(int bus, int require_parse); int pci_pir_route_interrupt(int bus, int device, int func, int pin); #endif +#define pci_cfgregread pci_cfgregread_domain +#define pci_cfgregwrite pci_cfgregwrite_domain + #endif /* !__X86_PCI_CFGREG_H__ */
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