Date: Tue, 13 Oct 2009 18:06:20 -0600 (MDT) From: "M. Warner Losh" <imp@bsdimp.com> To: xcllnt@mac.com Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r197969 - head/sys/conf Message-ID: <20091013.180620.-1542634329.imp@bsdimp.com> In-Reply-To: <2E290D8D-BAF0-4E4E-A352-B00FAFD9DF83@mac.com> References: <D3B2832A-0D7A-4B61-ACA1-DFC8EBC69182@mac.com> <20091013.113213.1449397633.imp@bsdimp.com> <2E290D8D-BAF0-4E4E-A352-B00FAFD9DF83@mac.com>
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In message: <2E290D8D-BAF0-4E4E-A352-B00FAFD9DF83@mac.com>
Marcel Moolenaar <xcllnt@mac.com> writes:
:
: On Oct 13, 2009, at 10:32 AM, M. Warner Losh wrote:
: > : > Why? They should be scanned for on any system with a real isa
: > bus...
: > :
: > : Other than i386, those are?
: >
: > So other than i386 and amd64, what systems use the isa device?
:
: I interpret the lack of answer as: none.
:
: isa(4) is usable on various architectures where the southbridge
: contains a LPC or similar. The MPC8555 CDS, for example, has a
: VIA southbridge that we need to talk to in order to get to the
: ATPIC for dealing with the nested interrupt. isa(4) is the device
: for this, but isaorm is causing kernel panics simply because
: the memory between 0xC0000 and 0x100000 is not reserved for ISA
: option ROMs. Likewise for Itanium, sparc64, etc...
Does this mean that the memory cycles on the I/O bus isn't supported
for these architectures? Or that it is and we just don't implement it
in the platform specific interfaces for it? The memory space is
reserved for any system that has a ISA bus, but it might not be at
physical address 0xc0000, etc.
: In short: scanning for option ROMs is not possible in all cases
: where ISA compatibility is provided.
Why is that? The platform specific code needs to implement the
necessary hooks to support this.
Warner
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