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Date:      Mon, 12 Jul 2021 12:00:43 GMT
From:      Konstantin Belousov <kib@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org
Subject:   git: 48acda2b2d6d - main - mlx5en: Honor IFCAP_VXLAN_HWCSUM
Message-ID:  <202107121200.16CC0hhd008637@gitrepo.freebsd.org>

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The branch main has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=48acda2b2d6d173a2231a3db153dd4709dcb5276

commit 48acda2b2d6d173a2231a3db153dd4709dcb5276
Author:     Konstantin Belousov <konstantinb@nvidia.com>
AuthorDate: 2021-04-20 11:16:47 +0000
Commit:     Konstantin Belousov <kib@FreeBSD.org>
CommitDate: 2021-07-12 09:34:39 +0000

    mlx5en: Honor IFCAP_VXLAN_HWCSUM
    
    In particular, avoid creating TIR or installing flow rules for VXLAN
    if the capability is disabled.
    
    Reported and reviewed by:       hselasky
    Sponsored by:   Mellanox Technologies/NVidia Networking
    MFC after:      1 week
---
 sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c | 77 +++++++++++++++++++------------
 sys/dev/mlx5/mlx5_en/mlx5_en_main.c       | 44 ++++++++++--------
 2 files changed, 74 insertions(+), 47 deletions(-)

diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
index a493e530a4c8..6be95550c713 100644
--- a/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
+++ b/sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
@@ -732,7 +732,8 @@ mlx5e_add_vlan_rule_sub(struct mlx5e_priv *priv,
 	int err = 0;
 
 	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
-	dest.ft = priv->fts.vxlan.t;
+	dest.ft = ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) ?
+	    priv->fts.vxlan.t : priv->fts.main.t;
 
 	mc_enable = MLX5_MATCH_OUTER_HEADERS;
 
@@ -1845,13 +1846,15 @@ mlx5e_add_vxlan_rule(struct mlx5e_priv *priv, sa_family_t family, u_int port)
 	}
 	el = mlx5e_vxlan_alloc_db_el(priv, proto, port);
 
-	err = mlx5e_add_vxlan_rule_from_db(priv, el);
-	if (err == 0) {
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_add_vxlan_rule_from_db(priv, el);
+		if (err == 0)
+			el->installed = true;
+	}
+	if (err == 0)
 		TAILQ_INSERT_TAIL(&priv->vxlan.head, el, link);
-		el->installed = true;
-	} else {
+	else
 		kvfree(el);
-	}
 
 	return (err);
 }
@@ -2235,40 +2238,53 @@ mlx5e_open_flow_table(struct mlx5e_priv *priv)
 	if (err)
 		return (err);
 
-	err = mlx5e_create_vxlan_flow_table(priv);
-	if (err)
-		goto err_destroy_vlan_flow_table;
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_create_vxlan_flow_table(priv);
+		if (err)
+			goto err_destroy_vlan_flow_table;
+	}
 
 	err = mlx5e_create_main_flow_table(priv, false);
 	if (err)
 		goto err_destroy_vxlan_flow_table;
 
-	err = mlx5e_create_main_flow_table(priv, true);
-	if (err)
-		goto err_destroy_main_flow_table;
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_create_main_flow_table(priv, true);
+		if (err)
+			goto err_destroy_main_flow_table;
+	}
 
-	err = mlx5e_create_inner_rss_flow_table(priv);
-	if (err)
-		goto err_destroy_main_vxlan_flow_table;
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_create_inner_rss_flow_table(priv);
+		if (err)
+			goto err_destroy_main_vxlan_flow_table;
+	}
 
-	err = mlx5e_add_vxlan_catchall_rule(priv);
-	if (err != 0)
-		goto err_destroy_inner_rss_flow_table;
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_add_vxlan_catchall_rule(priv);
+		if (err != 0)
+			goto err_destroy_inner_rss_flow_table;
+	}
 
-	err = mlx5e_add_main_vxlan_rules(priv);
-	if (err != 0)
-		goto err_destroy_inner_rss_flow_table;
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_add_main_vxlan_rules(priv);
+		if (err != 0)
+			goto err_destroy_inner_rss_flow_table;
+	}
 
 	return (0);
 
 err_destroy_inner_rss_flow_table:
-	mlx5e_destroy_inner_rss_flow_table(priv);
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_destroy_inner_rss_flow_table(priv);
 err_destroy_main_vxlan_flow_table:
-	mlx5e_destroy_main_vxlan_flow_table(priv);
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_destroy_main_vxlan_flow_table(priv);
 err_destroy_main_flow_table:
 	mlx5e_destroy_main_flow_table(priv);
 err_destroy_vxlan_flow_table:
-	mlx5e_destroy_vxlan_flow_table(priv);
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_destroy_vxlan_flow_table(priv);
 err_destroy_vlan_flow_table:
 	mlx5e_destroy_vlan_flow_table(priv);
 
@@ -2280,11 +2296,14 @@ mlx5e_close_flow_table(struct mlx5e_priv *priv)
 {
 
 	mlx5e_handle_ifp_addr(priv);
-	mlx5e_destroy_inner_rss_flow_table(priv);
-	mlx5e_del_vxlan_catchall_rule(priv);
-	mlx5e_destroy_vxlan_flow_table(priv);
-	mlx5e_del_main_vxlan_rules(priv);
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		mlx5e_destroy_inner_rss_flow_table(priv);
+		mlx5e_del_vxlan_catchall_rule(priv);
+		mlx5e_destroy_vxlan_flow_table(priv);
+		mlx5e_del_main_vxlan_rules(priv);
+	}
 	mlx5e_destroy_main_flow_table(priv);
-	mlx5e_destroy_main_vxlan_flow_table(priv);
+	if ((priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_destroy_main_vxlan_flow_table(priv);
 	mlx5e_destroy_vlan_flow_table(priv);
 }
diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
index 9a01940ca90c..ab1d627c0fbc 100644
--- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
+++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c
@@ -2810,10 +2810,8 @@ mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 * tirc, int tt, bool inner_vxla
 		    lro_timer_supported_periods[2]));
 	}
 
-	if (inner_vxlan &&
-	    (priv->ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+	if (inner_vxlan)
 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
-	}
 
 	/* setup parameters for hashing TIR type, if any */
 	switch (tt) {
@@ -3127,10 +3125,13 @@ mlx5e_open_locked(struct ifnet *ifp)
 		mlx5_en_err(ifp, "mlx5e_open_tir(main) failed, %d\n", err);
 		goto err_close_rqls;
 	}
-	err = mlx5e_open_tirs(priv, true);
-	if (err) {
-		mlx5_en_err(ifp, "mlx5e_open_tir(inner) failed, %d\n", err);
-		goto err_close_tirs;
+	if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_open_tirs(priv, true);
+		if (err) {
+			mlx5_en_err(ifp, "mlx5e_open_tir(inner) failed, %d\n",
+			    err);
+			goto err_close_tirs;
+		}
 	}
 	err = mlx5e_open_flow_table(priv);
 	if (err) {
@@ -3144,11 +3145,13 @@ mlx5e_open_locked(struct ifnet *ifp)
 		    "mlx5e_add_all_vlan_rules failed, %d\n", err);
 		goto err_close_flow_table;
 	}
-	err = mlx5e_add_all_vxlan_rules(priv);
-	if (err) {
-		mlx5_en_err(ifp,
-		    "mlx5e_add_all_vxlan_rules failed, %d\n", err);
-		goto err_del_vlan_rules;
+	if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0) {
+		err = mlx5e_add_all_vxlan_rules(priv);
+		if (err) {
+			mlx5_en_err(ifp,
+			    "mlx5e_add_all_vxlan_rules failed, %d\n", err);
+			goto err_del_vlan_rules;
+		}
 	}
 	set_bit(MLX5E_STATE_OPENED, &priv->state);
 
@@ -3164,7 +3167,8 @@ err_close_flow_table:
 	mlx5e_close_flow_table(priv);
 
 err_close_tirs_inner:
-	mlx5e_close_tirs(priv, true);
+	if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_close_tirs(priv, true);
 
 err_close_tirs:
 	mlx5e_close_tirs(priv, false);
@@ -3213,10 +3217,12 @@ mlx5e_close_locked(struct ifnet *ifp)
 
 	mlx5e_set_rx_mode_core(priv);
 	mlx5e_del_all_vlan_rules(priv);
-	mlx5e_del_all_vxlan_rules(priv);
+	if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_del_all_vxlan_rules(priv);
 	if_link_state_change(priv->ifp, LINK_STATE_DOWN);
 	mlx5e_close_flow_table(priv);
-	mlx5e_close_tirs(priv, true);
+	if ((ifp->if_capenable & IFCAP_VXLAN_HWCSUM) != 0)
+		mlx5e_close_tirs(priv, true);
 	mlx5e_close_tirs(priv, false);
 	mlx5e_close_rqt(priv);
 	mlx5e_close_channels(priv);
@@ -3457,14 +3463,16 @@ mlx5e_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
 		if (mask & IFCAP_WOL_MAGIC)
 			ifp->if_capenable ^= IFCAP_WOL_MAGIC;
 		if (mask & IFCAP_VXLAN_HWCSUM) {
+			int was_opened = test_bit(MLX5E_STATE_OPENED,
+			    &priv->state);
+			if (was_opened)
+				mlx5e_close_locked(ifp);
 			ifp->if_capenable ^= IFCAP_VXLAN_HWCSUM;
 			ifp->if_hwassist ^= CSUM_INNER_IP | CSUM_INNER_IP_UDP |
 			    CSUM_INNER_IP_TCP | CSUM_INNER_IP6_UDP |
 			    CSUM_INNER_IP6_TCP;
-			if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
-				mlx5e_close_locked(ifp);
+			if (was_opened)
 				mlx5e_open_locked(ifp);
-			}
 		}
 		if (mask & IFCAP_VXLAN_HWTSO) {
 			ifp->if_capenable ^= IFCAP_VXLAN_HWTSO;



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