Date: Mon, 2 Sep 1996 13:00:12 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: smp@csn.net (Steve Passe) Cc: terry@lambert.org, freebsd-smp@FreeBSD.ORG, rv@groa.uct.ac.za, erich@uruk.org Subject: Re: SMP on Intel MG15 Message-ID: <199609022000.NAA02837@phaeton.artisoft.com> In-Reply-To: <199609021942.NAA06348@clem.systemsix.com> from "Steve Passe" at Sep 2, 96 01:42:45 pm
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> Terry,
>
> >B.4.1 specifically applies only to the 82489DX APIC. Is this a 486
> >MP box you are trying to get running?
>
> I am using document "Intel MP spec 1.4, July 1995, rev -004"
>
> section B.4.1 says:
>
> INIT IPIs can be used with systems based on the 82489DX APIC, or on systems
> that are based on multiple Pentium (735/90, 815/100) processors.
Ah. I am quopting a 1.1 specification because the current one up for
FTP won't print on HP PostScript printers, and being a FreeBSD person,
I don't have any Adobe code I can run to use the PDF version instead.
I'm waiting for a hardcopy via snail-mail.
This is certainly a change, and meshes with what Russell quoted from
his dmesg output -- the board claims it is a version 1.4 specification
compliant board.
> MP Floating Pointer Structure found in BIOS @ physical address 0x000f7ba0:
> signature: '_MP_, length: 16 bytes
> version: 1.4, checksum: 0x66
^^^--- the damning version number ********
> >I think it's more likely that the problem is the system default state
> >doesn't match one of the allowable configurations, and is maybe using
> >a defaul configuration that we aren't handling properly. See chapter
> >5 of the spec, "Default Configurations".
>
> As the above printout shows, the system is using an MP configuration table.
> we have changed the cpu_nmbr to reflect the fact that the AP is #2, NOT
> #1. this change allows the kernel to boot without hanging, (default AP #1
> hangs...). we are monitoring the APIC error registors and they seem happy.
I suppose this still leaves the problem of how to tell which of the
startup methods will work, since you don't want to stomp the warm-reset
vector if you can avoid it, since the only way to reliably cause a
PC-class machine to reset is to force it to real mode and cause it to
jump to the warm reset vector. 8-(.
Does the B.4.1 specifically state that STARTUP IPI *can't* be use on
the (735/90, 815/100) processors, or give some other way to tell, from
software, when it is necessary?
Terry Lambert
terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.
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