Date: Fri, 1 Apr 2022 12:34:25 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: b57e32117576 - releng/13.1 - Treat cache write as a read in arm64 data faults Message-ID: <202204011234.231CYPF7060374@gitrepo.freebsd.org>
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The branch releng/13.1 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=b57e321175768358fcae767e2828e04e3ce7fa3d commit b57e321175768358fcae767e2828e04e3ce7fa3d Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2022-03-26 15:59:34 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2022-04-01 11:15:08 +0000 Treat cache write as a read in arm64 data faults On arm64 we can ask the hardware to perform cache operations from userspace. These require read permission however when the memory is unmapped the kernel will receive a write exception. Add a check to see if the cause of the exception is from the cache and pass a memory read fault type to the vm subsystem. PR: 262836 Reported by: dch Approved by: re (gjb) Sponsored by: The FreeBSD Foundation (cherry picked from commit 029c1c4828aab451ba262cd4e2e1d9362cf18b76) (cherry picked from commit 004da2d51f8427745c0d1287781d5ba546b19000) --- sys/arm64/arm64/trap.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c index a8d29ffaa9a7..849f26ee8220 100644 --- a/sys/arm64/arm64/trap.c +++ b/sys/arm64/arm64/trap.c @@ -317,8 +317,16 @@ data_abort(struct thread *td, struct trapframe *frame, uint64_t esr, ftype = VM_PROT_EXECUTE; break; default: - ftype = (esr & ISS_DATA_WnR) == 0 ? VM_PROT_READ : - VM_PROT_WRITE; + /* + * If the exception was because of a read or cache operation + * pass a read fault type into the vm code. Cache operations + * need read permission but will set the WnR flag when the + * memory is unmapped. + */ + if ((esr & ISS_DATA_WnR) == 0 || (esr & ISS_DATA_CM) != 0) + ftype = VM_PROT_READ; + else + ftype = VM_PROT_WRITE; break; }
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