Date: Thu, 2 Feb 2023 11:25:55 GMT From: Emmanuel Vadot <manu@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: e83f76ac2188 - stable/13 - usb/dwc3: Only force USB2 based on the PHY register and IP version Message-ID: <202302021125.312BPtT0091173@gitrepo.freebsd.org>
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The branch stable/13 has been updated by manu: URL: https://cgit.FreeBSD.org/src/commit/?id=e83f76ac2188ae7aaf9913d352c23940b9e385d7 commit e83f76ac2188ae7aaf9913d352c23940b9e385d7 Author: Emmanuel Vadot <manu@FreeBSD.org> AuthorDate: 2022-11-15 12:54:49 +0000 Commit: Emmanuel Vadot <manu@FreeBSD.org> CommitDate: 2023-02-02 11:25:47 +0000 usb/dwc3: Only force USB2 based on the PHY register and IP version We shouldn't force USB2 only based on if we have an external PHY. The internal PHY register tell us what link speed we can acheive and we need to force USB2 only if it cannot do USB3. This is only available after revision 0x290A of the dwc3 IP. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D37394 Fixed: 1331c0f44b6a ("Add support for RockChip RK356X to DWC3 driver.") Sponsored by: Beckhoff Automation GmbH & Co. KG (cherry picked from commit d47f5f2886f082281ae6f97dd5fe9440ad31e6d5) --- sys/dev/usb/controller/dwc3.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/sys/dev/usb/controller/dwc3.c b/sys/dev/usb/controller/dwc3.c index 40405927685e..d5e3b3f50a9d 100644 --- a/sys/dev/usb/controller/dwc3.c +++ b/sys/dev/usb/controller/dwc3.c @@ -458,12 +458,19 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt) error = phy_get_by_ofw_name(dev, node, "usb3-phy", &usb3_phy); if (error == 0 && usb3_phy != NULL) phy_enable(usb3_phy); - else { - reg = DWC3_READ(sc, DWC3_GUCTL1); - if (bootverbose) - device_printf(dev, "Forcing USB2 clock only\n"); - reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; - DWC3_WRITE(sc, DWC3_GUCTL1, reg); + if (sc->snpsversion == DWC3_IP_ID) { + if (sc->snpsrevision >= 0x290A) { + uint32_t hwparams3; + + hwparams3 = DWC3_READ(sc, DWC3_GHWPARAMS3); + if (DWC3_HWPARAMS3_SSPHY(hwparams3) == DWC3_HWPARAMS3_SSPHY_DISABLE) { + reg = DWC3_READ(sc, DWC3_GUCTL1); + if (bootverbose) + device_printf(dev, "Forcing USB2 clock only\n"); + reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; + DWC3_WRITE(sc, DWC3_GUCTL1, reg); + } + } } snps_dwc3_configure_phy(sc, node); skip_phys:
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