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Date:      Thu, 20 Jun 2002 19:44:18 +0900
From:      Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp>
To:        Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp>
Cc:        arch@FreeBSD.org
Subject:   Re: multiple threads for interrupts
Message-ID:  <200206201044.g5KAiJ3i032356@rina.r.dl.itc.u-tokyo.ac.jp>
In-Reply-To: <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp>
References:  <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp>

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On Thu, 20 Jun 2002 19:35:05 +0900,
  Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp> said:

tanimura> At the moment, each interrupt type (hardware and swi) has only one
tanimura> kernel thread to handle interrupts.  This can be a potential
tanimura> bottleneck in an SMP host because virtually only up to one processor
tanimura> can handle interrupts.

tanimura> One solution is to run multiple threads for each of the interrupt
tanimura> types.  Since I noticed this issue first during my work of network
tanimura> locking, I have been tweaking the swi subsystem so that it runs
tanimura> multiple threads for an swi type.  For those who are interested, the
tanimura> patch can be found at:

tanimura> http://people.FreeBSD.org/~tanimura/patches/swipool.diff.gz

With this patch, the system runs as many kernel threads as the number
of CPUs for each swi types:

naho% dmesg | grep SMP
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
naho% ps axuwwg | grep swi
root        13  0.0  0.0     0    3  ??  WL    1Jan70   3:08.71  (swi1: net)
root        14  0.0  0.0     0    3  ??  WL    1Jan70   3:05.91  (swi1: net)
root        15  0.1  0.0     0    3  ??  WL    1Jan70   6:37.67  (swi6: tty:sio clock)
root        16  0.0  0.0     0    3  ??  WL    1Jan70   5:56.67  (swi6: tty:sio clock)
root        17  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi4: vm)
root        18  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi4: vm)
root        20  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi2: camnet)
root        21  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi2: camnet)
root        22  0.0  0.0     0    3  ??  WL    1Jan70   0:00.25  (swi3: cambio)
root        23  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi3: cambio)
root        24  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi5: task queue)
root        25  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi5: task queue)
root        30  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi0: tty:sio)
root        31  0.0  0.0     0    3  ??  WL    1Jan70   0:00.00  (swi0: tty:sio)
tanimura 47144  0.0  0.1   308   46  p1  M+    7:38PM   0:00.00 grep swi

The number of CPUs is chosen for the number of kernel threads per an
swi type because it is the maximum possible number of threads runnable
in parallel.  It gives us nothing but contention to run more threads.

tanimura> While I worked on only swis, hardware interrupts should suffer from
tanimura> the same issue as well.  Thus it would be better to tweak the general
tanimura> interrupt mechanism rather than only the swi subsystem.  I will see
tanimura> how that works in the next few days.

tanimura> Comments and flames are welcome.  Thanks a lot.

-- 
Seigo Tanimura <tanimura@r.dl.itc.u-tokyo.ac.jp> <tanimura@FreeBSD.org>

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