Date: Tue, 28 Nov 2006 22:34:49 GMT From: Warner Losh <imp@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 110638 for review Message-ID: <200611282234.kASMYnPi005353@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=110638 Change 110638 by imp@imp_lighthouse on 2006/11/28 22:34:44 check for errors too. Not sure I clear them all correctly, but it is a start. # We wedge something hard, however, when we try to write to a part # that doesn't have write enable asserted. Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91_twi.c#30 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91_twi.c#30 (text+ko) ==== @@ -204,10 +204,10 @@ struct at91_twi_softc *sc = xsc; uint32_t status; - /* Reading the status also clears the interrupt */ status = RD4(sc, TWI_SR); if (status == 0) return; + sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK); if (status & TWI_SR_RXRDY) sc->flags |= TWI_SR_RXRDY; if (status & TWI_SR_TXRDY) @@ -227,7 +227,9 @@ sc->flags = 0; WR4(sc, TWI_IER, bit); err = msleep(sc, &sc->sc_mtx, PZERO | PCATCH, "iic", MAX(1,hz/10)); - if (sc->flags & bit) + if (sc->flags & ~bit) + err = EIO; + else if (sc->flags & bit) err = 0; else if (err == 0) err = EBUSY;
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