Date: Fri, 19 May 2017 08:19:39 +0000 (UTC) From: Wojciech Macek <wma@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r318522 - in head/sys: arm/mv dev/cesa Message-ID: <201705190819.v4J8JdkY003010@repo.freebsd.org>
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Author: wma Date: Fri May 19 08:19:39 2017 New Revision: 318522 URL: https://svnweb.freebsd.org/changeset/base/318522 Log: Enable proper configuration of CESA MBUS windows For all Marvell devices, MBUS windows configuration is done in a common place. Only CESA was an exception, so move its related code from driver to mv_common.c. This way it uses same proper DRAM information, same as all other interfaces instead of parsing DT /memory node directly. Submitted by: Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: loos Differential revision: https://reviews.freebsd.org/D10723 Modified: head/sys/arm/mv/mv_common.c head/sys/arm/mv/mvwin.h head/sys/dev/cesa/cesa.c head/sys/dev/cesa/cesa.h Modified: head/sys/arm/mv/mv_common.c ============================================================================== --- head/sys/arm/mv/mv_common.c Fri May 19 08:16:47 2017 (r318521) +++ head/sys/arm/mv/mv_common.c Fri May 19 08:19:39 2017 (r318522) @@ -76,6 +76,7 @@ MALLOC_DEFINE(M_IDMA, "idma", "idma dma static int win_eth_can_remap(int i); +static int decode_win_cesa_valid(void); static int decode_win_cpu_valid(void); static int decode_win_usb_valid(void); static int decode_win_usb3_valid(void); @@ -91,6 +92,7 @@ static void decode_win_cpu_setup(void); #ifdef SOC_MV_ARMADAXP static int decode_win_sdram_fixup(void); #endif +static void decode_win_cesa_setup(u_long); static void decode_win_usb_setup(u_long); static void decode_win_usb3_setup(u_long); static void decode_win_eth_setup(u_long); @@ -101,6 +103,7 @@ static void decode_win_sdhci_setup(u_lon static void decode_win_idma_setup(u_long); static void decode_win_xor_setup(u_long); +static void decode_win_cesa_dump(u_long); static void decode_win_usb_dump(u_long); static void decode_win_usb3_dump(u_long); static void decode_win_eth_dump(u_long base); @@ -146,6 +149,7 @@ static struct soc_node_spec soc_nodes[] { "mrvl,sata", &decode_win_sata_setup, NULL }, { "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump }, { "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump }, + { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump }, { "mrvl,pcie", &decode_win_pcie_setup, NULL }, { NULL, NULL, NULL }, }; @@ -574,7 +578,7 @@ soc_decode_win(void) !decode_win_eth_valid() || !decode_win_idma_valid() || !decode_win_pcie_valid() || !decode_win_sata_valid() || !decode_win_xor_valid() || !decode_win_usb3_valid() || - !decode_win_sdhci_valid()) + !decode_win_sdhci_valid() || !decode_win_cesa_valid()) return (EINVAL); decode_win_cpu_setup(); @@ -601,6 +605,11 @@ WIN_REG_IDX_WR(win_cpu, br, MV_WIN_CPU_B WIN_REG_IDX_WR(win_cpu, remap_l, MV_WIN_CPU_REMAP_LO, MV_MBUS_BRIDGE_BASE) WIN_REG_IDX_WR(win_cpu, remap_h, MV_WIN_CPU_REMAP_HI, MV_MBUS_BRIDGE_BASE) +WIN_REG_BASE_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL) +WIN_REG_BASE_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE) +WIN_REG_BASE_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL) +WIN_REG_BASE_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE) + WIN_REG_BASE_IDX_RD(win_usb, cr, MV_WIN_USB_CTRL) WIN_REG_BASE_IDX_RD(win_usb, br, MV_WIN_USB_BASE) WIN_REG_BASE_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL) @@ -1071,6 +1080,63 @@ ddr_target(int i) } /************************************************************************** + * CESA windows routines + **************************************************************************/ +static int +decode_win_cesa_valid(void) +{ + + return (decode_win_can_cover_ddr(MV_WIN_CESA_MAX)); +} + +static void +decode_win_cesa_dump(u_long base) +{ + int i; + + for (i = 0; i < MV_WIN_CESA_MAX; i++) + printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i, + win_cesa_cr_read(base, i), win_cesa_br_read(base, i)); +} + +/* + * Set CESA decode windows. + */ +static void +decode_win_cesa_setup(u_long base) +{ + uint32_t br, cr; + int i, j; + + for (i = 0; i < MV_WIN_CESA_MAX; i++) { + win_cesa_cr_write(base, i, 0); + win_cesa_br_write(base, i, 0); + } + + /* Only access to active DRAM banks is required */ + for (i = 0; i < MV_WIN_DDR_MAX; i++) { + if (ddr_is_active(i)) { + br = ddr_base(i); + + cr = (((ddr_size(i) - 1) & 0xffff0000) | + (ddr_attr(i) << IO_WIN_ATTR_SHIFT) | + (ddr_target(i) << IO_WIN_TGT_SHIFT) | + IO_WIN_ENA_MASK); + + /* Set the first free CESA window */ + for (j = 0; j < MV_WIN_CESA_MAX; j++) { + if (win_cesa_cr_read(base, j) & 0x1) + continue; + + win_cesa_br_write(base, j, br); + win_cesa_cr_write(base, j, cr); + break; + } + } + } +} + +/************************************************************************** * USB windows routines **************************************************************************/ static int Modified: head/sys/arm/mv/mvwin.h ============================================================================== --- head/sys/arm/mv/mvwin.h Fri May 19 08:16:47 2017 (r318521) +++ head/sys/arm/mv/mvwin.h Fri May 19 08:19:39 2017 (r318522) @@ -216,6 +216,11 @@ #define MV_WIN_CESA_ATTR(eng_sel) 0 #endif +/* CESA TDMA address decoding registers */ +#define MV_WIN_CESA_CTRL(n) (0x8 * (n) + 0xA04) +#define MV_WIN_CESA_BASE(n) (0x8 * (n) + 0xA00) +#define MV_WIN_CESA_MAX 4 + #define MV_WIN_USB_CTRL(n) (0x10 * (n) + 0x320) #define MV_WIN_USB_BASE(n) (0x10 * (n) + 0x324) #define MV_WIN_USB_MAX 4 Modified: head/sys/dev/cesa/cesa.c ============================================================================== --- head/sys/dev/cesa/cesa.c Fri May 19 08:16:47 2017 (r318521) +++ head/sys/dev/cesa/cesa.c Fri May 19 08:19:39 2017 (r318522) @@ -69,7 +69,6 @@ __FBSDID("$FreeBSD$"); #include "cryptodev_if.h" #include <arm/mv/mvreg.h> -#include <arm/mv/mvwin.h> #include <arm/mv/mvvar.h> #include "cesa.h" @@ -80,7 +79,6 @@ static void cesa_intr(void *); static int cesa_newsession(device_t, u_int32_t *, struct cryptoini *); static int cesa_freesession(device_t, u_int64_t); static int cesa_process(device_t, struct cryptop *, int); -static int decode_win_cesa_setup(struct cesa_softc *sc); static struct resource_spec cesa_res_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, @@ -1085,13 +1083,6 @@ cesa_attach(device_t dev) goto err0; } - /* Setup CESA decoding windows */ - error = decode_win_cesa_setup(sc); - if (error) { - device_printf(dev, "could not setup decoding windows\n"); - goto err1; - } - /* Acquire SRAM base address */ error = cesa_setup_sram(sc); if (error) { @@ -1706,50 +1697,3 @@ cesa_process(device_t dev, struct crypto return (0); } - -/* - * Set CESA TDMA decode windows. - */ -static int -decode_win_cesa_setup(struct cesa_softc *sc) -{ - struct mem_region availmem_regions[FDT_MEM_REGIONS]; - int availmem_regions_sz; - uint32_t br, cr, i; - - /* Grab physical memory regions information from DTS */ - if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz, - NULL) != 0) - return (ENXIO); - - if (availmem_regions_sz > MV_WIN_CESA_MAX) { - device_printf(sc->sc_dev, "Too much memory regions, cannot " - " set CESA windows to cover whole DRAM \n"); - return (ENXIO); - } - - /* Disable and clear all CESA windows */ - for (i = 0; i < MV_WIN_CESA_MAX; i++) { - CESA_TDMA_WRITE(sc, MV_WIN_CESA_BASE(i), 0); - CESA_TDMA_WRITE(sc, MV_WIN_CESA_CTRL(i), 0); - } - - /* Fill CESA TDMA decoding windows with information acquired from DTS */ - for (i = 0; i < availmem_regions_sz; i++) { - br = availmem_regions[i].mr_start; - cr = availmem_regions[i].mr_size; - - /* Don't add entries with size lower than 64KB */ - if (cr & 0xffff0000) { - cr = (((cr - 1) & 0xffff0000) | - (MV_WIN_DDR_ATTR(i) << MV_WIN_CPU_ATTR_SHIFT) | - (MV_WIN_DDR_TARGET << MV_WIN_CPU_TARGET_SHIFT) | - MV_WIN_CPU_ENABLE_BIT); - CESA_TDMA_WRITE(sc, MV_WIN_CESA_BASE(i), br); - CESA_TDMA_WRITE(sc, MV_WIN_CESA_CTRL(i), cr); - } - } - - return (0); -} - Modified: head/sys/dev/cesa/cesa.h ============================================================================== --- head/sys/dev/cesa/cesa.h Fri May 19 08:16:47 2017 (r318521) +++ head/sys/dev/cesa/cesa.h Fri May 19 08:19:39 2017 (r318522) @@ -350,11 +350,6 @@ struct cesa_chain_info { #define CESA_TDMA_EMR_BOTH_HIT CESA_TDMA_ECR_BOTH_HIT #define CESA_TDMA_EMR_DATA_ERROR CESA_TDMA_ECR_DATA_ERROR -/* CESA TDMA address decoding registers */ -#define MV_WIN_CESA_CTRL(n) (0x8 * (n) + 0xA04) -#define MV_WIN_CESA_BASE(n) (0x8 * (n) + 0xA00) -#define MV_WIN_CESA_MAX 4 - /* CESA SA registers definitions */ #define CESA_SA_CMD 0x0E00 #define CESA_SA_CMD_ACTVATE (1 << 0)
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