Date: Thu, 22 May 2008 13:23:09 +0900 From: Pyun YongHyeon <pyunyh@gmail.com> To: Norikatsu Shigemura <nork@FreeBSD.org> Cc: freebsd-current@FreeBSD.org Subject: Re: Cardbus GbE (Realtek 8169SBL) supported? Message-ID: <20080522042309.GC37422@cdnetworks.co.kr> In-Reply-To: <20080522105032.ef90ec84.nork@FreeBSD.org> References: <20080517231220.c64a992b.nork@FreeBSD.org> <20080519071459.GA26209@cdnetworks.co.kr> <20080519100523.GB26209@cdnetworks.co.kr> <20080520025052.0efd7cd5.nork@FreeBSD.org> <20080520001312.GA29721@cdnetworks.co.kr> <20080522102032.45f11aa2.nork@FreeBSD.org> <20080522012846.GB37422@cdnetworks.co.kr> <20080522105032.ef90ec84.nork@FreeBSD.org>
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--EVF5PPMfhYS0aIcm Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, May 22, 2008 at 10:50:32AM +0900, Norikatsu Shigemura wrote: > On Thu, 22 May 2008 10:28:46 +0900 > Pyun YongHyeon <pyunyh@gmail.com> wrote: > > Would you show me the output of "devinfo -v | grep oui"? > > Yes, please see attached file. And I forgot a panic. Thanks. Would you try attached patch? > When I removed RTL8169SBL from cardbus, or/and kldunload if_re, > I got a panic. Please see also panic messages, too. > This looks different issues to me. Would you show me backtrace info of the panic? -- Regards, Pyun YongHyeon --EVF5PPMfhYS0aIcm Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="rgephy.8211c.patch" --- sys/dev/mii/rgephy.c.orig 2008-03-05 10:15:10.000000000 +0900 +++ sys/dev/mii/rgephy.c 2008-05-22 13:16:29.000000000 +0900 @@ -34,7 +34,7 @@ __FBSDID("$FreeBSD: src/sys/dev/mii/rgephy.c,v 1.19 2008/03/05 01:15:10 yongari Exp $"); /* - * Driver for the RealTek 8169S/8110S/8211B internal 10/100/1000 PHY. + * Driver for the RealTek 8169S/8110S/8211B/8211C internal 10/100/1000 PHY. */ #include <sys/param.h> @@ -531,6 +531,18 @@ static void rgephy_reset(struct mii_softc *sc) { + struct rgephy_softc *rsc; + uint16_t ssr; + + rsc = (struct rgephy_softc *)sc; + if (rsc->mii_revision == 3) { + /* RTL8211C(L) */ + ssr = PHY_READ(sc, RGEPHY_MII_SSR); + if ((ssr & RGEPHY_SSR_ALDPS) != 0) { + ssr &= ~RGEPHY_SSR_ALDPS; + PHY_WRITE(sc, RGEPHY_MII_SSR, ssr); + } + } mii_phy_reset(sc); DELAY(1000); --- sys/dev/mii/rgephyreg.h.orig 2007-10-30 11:42:22.000000000 +0900 +++ sys/dev/mii/rgephyreg.h 2008-05-22 13:13:53.000000000 +0900 @@ -137,7 +137,7 @@ #define RGEPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */ #define RGEPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */ -/* RTL8211B(L) */ +/* RTL8211B(L)/8211C(L) */ #define RGEPHY_MII_SSR 0x11 /* PHY Specific status register */ #define RGEPHY_SSR_S1000 0x8000 /* 1000Mbps */ #define RGEPHY_SSR_S100 0x4000 /* 100Mbps */ @@ -148,6 +148,7 @@ #define RGEPHY_SSR_SPD_DPLX_RESOLVED 0x0800 /* speed/duplex resolved */ #define RGEPHY_SSR_LINK 0x0400 /* link up */ #define RGEPHY_SSR_MDI_XOVER 0x0040 /* MDI crossover */ +#define RGEPHY_SSR_ALDPS 0x0008 /* RTL8211C(L) only */ #define RGEPHY_SSR_JABBER 0x0001 /* Jabber */ #endif /* _DEV_RGEPHY_MIIREG_H_ */ --EVF5PPMfhYS0aIcm--
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