Date: Fri, 20 Dec 2013 16:56:39 +0400 From: Ruslan Bukin <br@FreeBSD.org> To: Wojciech Macek <wma@semihalf.com> Cc: freebsd-arm@freebsd.org Subject: Re: arm SMP on Cortex-A15 Message-ID: <20131220125638.GA5132@mail.bsdpad.com> In-Reply-To: <CANsEV8euHTsfviiCMP_aet3qYiK2T-oK%2B-37eay7zAPH2S2vaA@mail.gmail.com> References: <CANsEV8euHTsfviiCMP_aet3qYiK2T-oK%2B-37eay7zAPH2S2vaA@mail.gmail.com>
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On Thu, Dec 19, 2013 at 12:41:59PM +0100, Wojciech Macek wrote: > Hi, > > Finally, I'm able to run FreeBSD stable on Cortex-A15. The TLB issue which > was observed, was caused by an aggressive A15 feature called "L2 TLB > prefetch". > > There are 4 fixes that helped: > 0. Prerequisite, Olivier's patch for PCPU atomicity. > 1. TEX remap - to be compliant with spec, TEX remap is used to configure > memory as Inner Shareable > 2. TLB flush SE - after each PTE modification and PTE_SYNC, there is no > guarantee that newly created entry is not overlapped by old value in TLB > cache. Do flush_SE to ensure proper mapping. > 3. During context switch, ensure that tlb flush is executed after ttb is > changed. Clean BTB to be compliant with specs. > > Above patches can be found here > https://drive.google.com/folderview?id=0B-7yTLrPxaWteWFtWUQxVVNHVFk&usp=sharing > > > None of them is 100%-ready, but should work. Any comments and/or testing > are really appreciated. > Great!? I successfully run buildworld with these patches on SMP-enabled dual-core Cortex-A15 machine (Exynos5250) with no problems at all. My timings: kernel-toolchain - ~3h buildkernel - ~1h buildworld - ~16h Note I used NFS for mount source and obj using USB-based ethernet. The next test I will try to produce is to adding -j2 option. Thanks to all for this work! -------------------------------------------------------------- >>> World build completed on Fri Dec 20 12:47:42 UTC 2013 -------------------------------------------------------------- 57617.85 real 30765.18 user 13584.13 sys ok you have mail # # sysctl hw.ncpu hw.ncpu: 2 # -Ruslan
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