Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 19 Aug 1998 12:37:36 +1000
From:      "Andrew Reilly" <reilly@zeta.org.au>
To:        =?iso-8859-1?Q?Dag-Erling_Coidan_Sm=F8rgrav?= <dag-erli@ifi.uio.no>, Chen Hsiung Chan <frankch@waru.life.nthu.edu.tw>
Cc:        hackers@FreeBSD.ORG
Subject:   Re: Dual Celerons - anyone tried this?
Message-ID:  <19980819123736.A3980@reilly.home>
In-Reply-To: =?iso-8859-1?Q?=3Cxzpu33a5mca=2Efsf=40skejdbrimir=2Eifi=2Euio=2Eno=3E=3B?= =?iso-8859-1?Q?_from_Dag-Erling_Coidan_Sm=F8rgrav__on_Tue=2C_Aug_18=2C_1?= =?iso-8859-1?Q?998_at_03:41:25PM_%2B0000?=
References:  <19980818221129.30050@waru.life.nthu.edu.tw> <xzpu33a5mca.fsf@skejdbrimir.ifi.uio.no>

next in thread | previous in thread | raw e-mail | index | archive | help
On Tue, Aug 18, 1998 at 03:41:25PM +0000, Dag-Erling Coidan Smørgrav  wrote:
> Chen Hsiung Chan <frankch@waru.life.nthu.edu.tw> writes:
> >     In the report they mentioned that one can overclock celeron
> >     to 448MHz, combined with the dual capability, the machine is
> >     certainly screaming.
> 
> No matter how you shake it, a cache-less CPU does not scream except
> from anguish.

It does depend a lot on what you're doing.  You are probably
right if your workload is "make buildworld", but for most
multi-media applications L2-cache is not interestingly different
from raw DRAM, (because of the data volumes), and the only
useful caching performed is that done in function kernels, by
the L1-cache.  I believe that the Celeron has as much L1-cache
as any other processor out there at the moment (more or less).

-- 
Andrew

To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-hackers" in the body of the message



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?19980819123736.A3980>