Date: Sun, 6 May 2007 21:23:52 GMT From: Bruce M Simpson <bms@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 119372 for review Message-ID: <200705062123.l46LNq5A014153@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=119372 Change 119372 by bms@bms_anglepoise on 2007/05/06 21:23:11 Bringin YAMON shims from NetBSD. Use YAMON's SYSCON object to read board CPU frequency by default on MALTA. Needs latest gxemul snapshot to work in emulation; switching back to calibration from the Motorola RTC still works for the version of gxemul in ports. Affected files ... .. //depot/projects/mips2/src/sys/mips/conf/MALTA#14 edit .. //depot/projects/mips2/src/sys/mips/mips/tick.c#13 edit .. //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.c#3 edit .. //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.h#2 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/conf/MALTA#14 (text+ko) ==== @@ -30,8 +30,8 @@ makeoptions MODULES_OVERRIDE="" options KERNVIRTADDR=0x80100000 -#options TICK_USE_YAMON_FREQ=defined -options TICK_USE_MALTA_RTC=defined +options TICK_USE_YAMON_FREQ=defined +#options TICK_USE_MALTA_RTC=defined include "../mips4k/malta/std.malta" ==== //depot/projects/mips2/src/sys/mips/mips/tick.c#13 (text+ko) ==== @@ -52,12 +52,20 @@ #ifdef TICK_USE_YAMON_FREQ #include <mips/mips4k/malta/yamon.h> #endif + #ifdef TICK_USE_MALTA_RTC #include <mips/mips4k/malta/maltareg.h> #include <dev/mc146818/mc146818reg.h> #include <isa/rtc.h> #endif +/* + * Default is to assume a CPU pipeline clock of 100Mhz, and + * that CP0_COUNT increments every 2 cycles. + */ +#define MIPS_DEFAULT_HZ (100 * 1000 * 1000) +#define MIPS_DOUBLE_COUNT 1 + uint64_t counter_freq; uint64_t counts_per_hz; uint32_t counts_per_usec; @@ -110,6 +118,7 @@ return ((uint64_t)mips_rd_count()); } +/* XXX TODO: Calibrate SENTRY5 clock from custom CP0 PLL* registers. */ void tick_init_params(void) { @@ -120,24 +129,21 @@ do { #if defined(TICK_USE_YAMON_FREQ) /* - * Use the clock frequency specified in the environment - * variables providied to us by the YAMON monitor. + * If we are running on a board which uses YAMON firmware, + * then query CPU pipeline clock from the syscon object. + * If unsuccessful, use hard-coded default. */ - char *cp = yamon_getenv("khz"); - - if (cp == NULL) { - printf("cannot determine clock frequency, " - "defaulting to 10MHz\n"); - counter_freq = 10000000; - } else { - counter_freq = strtol(cp, (char **)NULL, 10) * 1000 ; + counter_freq = yamon_getcpufreq(); + if (counter_freq == 0) { + counter_freq = MIPS_DEFAULT_HZ; } #elif defined(TICK_USE_MALTA_RTC) + /* + * If we are running on a board with the MC146818 RTC, + * use it to determine CPU pipeline clock frequency. + */ u_int64_t counterval[2]; - /* - * Determine clock frequency from hardware. - */ /* Set RTC to binary mode. */ writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); @@ -158,19 +164,23 @@ counter_freq = counterval[1] - counterval[0]; #else /* - * Don't cause a call to DELAY() to happen when we haven't - * initialized the very things which DELAY() depends upon; - * it will cause a divide-by-zero trap. + * Use a completely fictional hardcoded default. */ - #if 0 - printf("using hard-coded default clock of 10MHz\n"); - #endif - counter_freq = 10000000; + counter_freq = MIPS_DEFAULT_HZ; #endif } while (0); counts_per_hz = counter_freq / hz; - counts_per_usec = counter_freq / 1000000; + counts_per_usec = counter_freq / (1 * 1000 * 1000); + + /* + * XXX: Some MIPS32 cores update the Count register + * only every two pipeline cycles. + */ + if (MIPS_DOUBLE_COUNT != 0) { + counts_per_hz /= 2; + counts_per_usec /= 2; + } printf("MIPS32 clock: %ju Hz\n", (intmax_t)counter_freq); ==== //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.c#3 (text+ko) ==== @@ -49,3 +49,17 @@ return (value); } + +uint32_t +yamon_getcpufreq(void) +{ + uint32_t freq; + int ret; + + ret = YAMON_SYSCON_READ(SYSCON_BOARD_CPU_CLOCK_FREQ_ID, &freq, + sizeof(freq)); + if (ret != 0) + freq = 0; + + return (freq); +} ==== //depot/projects/mips2/src/sys/mips/mips4k/malta/yamon.h#2 (text+ko) ==== @@ -1,40 +1,91 @@ /*- - * Copyright (c) 2007 Bruce M. Simpson. + * Copyright 2002 Wasabi Systems, Inc. * All rights reserved. * + * Written by Simon Burge for Wasabi Systems, Inc. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed for the NetBSD Project by + * Wasabi Systems, Inc. + * 4. The name of Wasabi Systems, Inc. may not be used to endorse + * or promote products derived from this software without specific prior + * written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * + * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _MALTA_YAMON_H_ #define _MALTA_YAMON_H_ +#define YAMON_FUNCTION_BASE 0x1fc00500 + +#define YAMON_PRINT_COUNT_OFS (YAMON_FUNCTION_BASE + 0x04) +#define YAMON_EXIT_OFS (YAMON_FUNCTION_BASE + 0x20) +#define YAMON_FLUSH_CACHE_OFS (YAMON_FUNCTION_BASE + 0x2c) +#define YAMON_PRINT_OFS (YAMON_FUNCTION_BASE + 0x34) +#define YAMON_REG_CPU_ISR_OFS (YAMON_FUNCTION_BASE + 0x38) +#define YAMON_DEREG_CPU_ISR_OFS (YAMON_FUNCTION_BASE + 0x3c) +#define YAMON_REG_IC_ISR_OFS (YAMON_FUNCTION_BASE + 0x40) +#define YAMON_DEREG_IC_ISR_OFS (YAMON_FUNCTION_BASE + 0x44) +#define YAMON_REG_ESR_OFS (YAMON_FUNCTION_BASE + 0x48) +#define YAMON_DEREG_ESR_OFS (YAMON_FUNCTION_BASE + 0x4c) +#define YAMON_GETCHAR_OFS (YAMON_FUNCTION_BASE + 0x50) +#define YAMON_SYSCON_READ_OFS (YAMON_FUNCTION_BASE + 0x54) + +#define YAMON_FUNC(ofs) (*(uint32_t *)(MIPS_PHYS_TO_KSEG0(ofs))) + +typedef void (*t_yamon_print_count)(uint32_t port, char *s, uint32_t count); +#define YAMON_PRINT_COUNT(s, count) \ + ((t_yamon_print_count)(YAMON_FUNC(YAMON_PRINT_COUNT_OFS)))(0, s, count) + +typedef void (*t_yamon_exit)(uint32_t rc); +#define YAMON_EXIT(rc) ((t_yamon_exit)(YAMON_FUNC(YAMON_EXIT_OFS)))(rc) + +typedef void (*t_yamon_print)(uint32_t port, const char *s); +#define YAMON_PRINT(s) ((t_yamon_print)(YAMON_FUNC(YAMON_PRINT_OFS)))(0, s) + +typedef int (*t_yamon_getchar)(uint32_t port, char *ch); +#define YAMON_GETCHAR(ch) \ + ((t_yamon_getchar)(YAMON_FUNC(YAMON_GETCHAR_OFS)))(0, ch) + +typedef int t_yamon_syscon_id; +typedef int (*t_yamon_syscon_read)(t_yamon_syscon_id id, void *param, + uint32_t size); +#define YAMON_SYSCON_READ(id, param, size) \ + ((t_yamon_syscon_read)(YAMON_FUNC(YAMON_SYSCON_READ_OFS))) \ + (id, param, size) + typedef struct { char *name; char *value; } yamon_env_t; +#define SYSCON_BOARD_CPU_CLOCK_FREQ_ID 34 /* UINT32 */ +#define SYSCON_BOARD_BUS_CLOCK_FREQ_ID 35 /* UINT32 */ +#define SYSCON_BOARD_PCI_FREQ_KHZ_ID 36 /* UINT32 */ + +char* yamon_getenv(char *name); +uint32_t yamon_getcpufreq(void); + extern yamon_env_t *fenvp[]; -char* yamon_getenv(char *name); - #endif /* _MALTA_YAMON_H_ */
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