Date: Mon, 27 Apr 2026 11:39:00 +0000 From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 04e4268f60e4 - main - arm64: Remove cpu_tlb_flushID now it's unused Message-ID: <69ef4ad4.1fc32.22e40749@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=04e4268f60e432097427e3d757aac6bc0ae24044 commit 04e4268f60e432097427e3d757aac6bc0ae24044 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2026-04-27 10:57:32 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2026-04-27 11:37:54 +0000 arm64: Remove cpu_tlb_flushID now it's unused Reviewed by: alc Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D52185 --- sys/arm64/arm64/cpufunc_asm.S | 16 ---------------- sys/arm64/include/cpufunc.h | 3 --- 2 files changed, 19 deletions(-) diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S index a13b97c2cdee..1b5a61204c1b 100644 --- a/sys/arm64/arm64/cpufunc_asm.S +++ b/sys/arm64/arm64/cpufunc_asm.S @@ -89,22 +89,6 @@ ENTRY(arm64_nullop) ret END(arm64_nullop) -/* - * Generic functions to read/modify/write the internal coprocessor registers - */ - -ENTRY(arm64_tlb_flushID) - dsb ishst -#ifdef SMP - tlbi vmalle1is -#else - tlbi vmalle1 -#endif - dsb ish - isb - ret -END(arm64_tlb_flushID) - /* * void arm64_dcache_wb_range(void *, vm_size_t) */ diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h index e9eee643216b..f600b30edf5f 100644 --- a/sys/arm64/include/cpufunc.h +++ b/sys/arm64/include/cpufunc.h @@ -196,8 +196,6 @@ extern int64_t dczva_line_size; #define cpu_nullop() arm64_nullop() #define cpufunc_nullop() arm64_nullop() -#define cpu_tlb_flushID() arm64_tlb_flushID() - #define cpu_dcache_wbinv_range(a, s) arm64_dcache_wbinv_range((a), (s)) #define cpu_dcache_inv_range(a, s) arm64_dcache_inv_range((a), (s)) #define cpu_dcache_wb_range(a, s) arm64_dcache_wb_range((a), (s)) @@ -208,7 +206,6 @@ extern void (*arm64_icache_sync_range)(void *, vm_size_t); #define cpu_icache_sync_range_checked(a, s) arm64_icache_sync_range_checked((a), (s)) void arm64_nullop(void); -void arm64_tlb_flushID(void); void arm64_dic_idc_icache_sync_range(void *, vm_size_t); void arm64_idc_aliasing_icache_sync_range(void *, vm_size_t); void arm64_aliasing_icache_sync_range(void *, vm_size_t);home | help
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