Date: Wed, 21 Oct 2009 18:38:02 +0000 (UTC) From: Marcel Moolenaar <marcel@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/amd64/amd64 pmap.c src/sys/arm/arm pmap.c src/sys/arm/mv mv_machdep.c src/sys/i386/i386 pmap.c src/sys/i386/xen pmap.c src/sys/ia64/ia64 pmap.c src/sys/kern sys_process.c src/sys/mips/mips pmap.c src/sys/powerpc/aim ... Message-ID: <200910211839.n9LIdBcl070060@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
marcel 2009-10-21 18:38:02 UTC FreeBSD src repository Modified files: sys/amd64/amd64 pmap.c sys/arm/arm pmap.c sys/arm/mv mv_machdep.c sys/i386/i386 pmap.c sys/i386/xen pmap.c sys/ia64/ia64 pmap.c sys/kern sys_process.c sys/mips/mips pmap.c sys/powerpc/aim mmu_oea.c mmu_oea64.c sys/powerpc/booke pmap.c sys/powerpc/include pmap.h sys/powerpc/powerpc mmu_if.m pmap_dispatch.c uio_machdep.c sys/sparc64/sparc64 pmap.c sys/sun4v/sun4v pmap.c sys/vm pmap.h vm_extern.h vm_glue.c Log: SVN rev 198341 on 2009-10-21 18:38:02Z by marcel o Introduce vm_sync_icache() for making the I-cache coherent with the memory or D-cache, depending on the semantics of the platform. vm_sync_icache() is basically a wrapper around pmap_sync_icache(), that translates the vm_map_t argumument to pmap_t. o Introduce pmap_sync_icache() to all PMAP implementation. For powerpc it replaces the pmap_page_executable() function, added to solve the I-cache problem in uiomove_fromphys(). o In proc_rwmem() call vm_sync_icache() when writing to a page that has execute permissions. This assures that when breakpoints are written, the I-cache will be coherent and the process will actually hit the breakpoint. o This also fixes the Book-E PMAP implementation that was missing necessary locking while trying to deal with the I-cache coherency in pmap_enter() (read: mmu_booke_enter_locked). The key property of this change is that the I-cache is made coherent *after* writes have been done. Doing it in the PMAP layer when adding or changing a mapping means that the I-cache is made coherent *before* any writes happen. The difference is key when the I-cache prefetches. Revision Changes Path 1.675 +5 -0 src/sys/amd64/amd64/pmap.c 1.116 +8 -2 src/sys/arm/arm/pmap.c 1.8 +1 -1 src/sys/arm/mv/mv_machdep.c 1.653 +5 -0 src/sys/i386/i386/pmap.c 1.25 +5 -0 src/sys/i386/xen/pmap.c 1.207 +27 -0 src/sys/ia64/ia64/pmap.c 1.156 +4 -0 src/sys/kern/sys_process.c 1.22 +5 -0 src/sys/mips/mips/pmap.c 1.131 +26 -8 src/sys/powerpc/aim/mmu_oea.c 1.5 +34 -16 src/sys/powerpc/aim/mmu_oea64.c 1.21 +40 -32 src/sys/powerpc/booke/pmap.c 1.27 +0 -1 src/sys/powerpc/include/pmap.h 1.12 +13 -7 src/sys/powerpc/powerpc/mmu_if.m 1.20 +5 -5 src/sys/powerpc/powerpc/pmap_dispatch.c 1.10 +0 -3 src/sys/powerpc/powerpc/uio_machdep.c 1.183 +5 -0 src/sys/sparc64/sparc64/pmap.c 1.48 +5 -0 src/sys/sun4v/sun4v/pmap.c 1.87 +1 -0 src/sys/vm/pmap.h 1.90 +1 -0 src/sys/vm/vm_extern.h 1.239 +7 -0 src/sys/vm/vm_glue.c
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200910211839.n9LIdBcl070060>