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Date:      Mon, 24 Feb 2014 05:55:00 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r262433 - head/sys/dev/etherswitch/arswitch
Message-ID:  <201402240555.s1O5t0ZQ044834@svn.freebsd.org>
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Author: adrian
Date: Mon Feb 24 05:55:00 2014
New Revision: 262433
URL: http://svnweb.freebsd.org/changeset/base/262433

Log:
  Add in port0/port6 configuration as part of the platform data code path.
  
  It's still hardcoded (for db120) but it is now hardcoded in all the
  same place (ie, the pdata path.)  The port config/status code now checks
  port0/port6 as appropriate to configure things.
  
  Tested:
  
  * Qualcomm Atheros DB120, AR8327 switch.

Modified:
  head/sys/dev/etherswitch/arswitch/arswitch_8327.c
  head/sys/dev/etherswitch/arswitch/arswitchvar.h

Modified: head/sys/dev/etherswitch/arswitch/arswitch_8327.c
==============================================================================
--- head/sys/dev/etherswitch/arswitch/arswitch_8327.c	Mon Feb 24 04:48:46 2014	(r262432)
+++ head/sys/dev/etherswitch/arswitch/arswitch_8327.c	Mon Feb 24 05:55:00 2014	(r262433)
@@ -123,7 +123,7 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg
 		t = AR8327_PAD_SGMII_EN;
 
 		/*
-		 * WAR for the QUalcomm Atheros AP136 board.
+		 * WAR for the Qualcomm Atheros AP136 board.
 		 * It seems that RGMII TX/RX delay settings needs to be
 		 * applied for SGMII mode as well, The ethernet is not
 		 * reliable without this.
@@ -183,6 +183,39 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg
 
 	return (t);
 }
+
+/*
+ * Map the hard-coded port config from the switch setup to
+ * the chipset port config (status, duplex, flow, etc.)
+ */
+static uint32_t
+ar8327_get_port_init_status(struct ar8327_port_cfg *cfg)
+{
+	uint32_t t;
+
+	if (!cfg->force_link)
+		return (AR8X16_PORT_STS_LINK_AUTO);
+
+	t = AR8X16_PORT_STS_TXMAC | AR8X16_PORT_STS_RXMAC;
+	t |= cfg->duplex ? AR8X16_PORT_STS_DUPLEX : 0;
+	t |= cfg->rxpause ? AR8X16_PORT_STS_RXFLOW : 0;
+	t |= cfg->txpause ? AR8X16_PORT_STS_TXFLOW : 0;
+
+	switch (cfg->speed) {
+	case AR8327_PORT_SPEED_10:
+		t |= AR8X16_PORT_STS_SPEED_10;
+		break;
+	case AR8327_PORT_SPEED_100:
+		t |= AR8X16_PORT_STS_SPEED_100;
+		break;
+	case AR8327_PORT_SPEED_1000:
+		t |= AR8X16_PORT_STS_SPEED_1000;
+		break;
+	}
+
+	return (t);
+}
+
 /*
  * Initialise the ar8327 specific hardware features from
  * the hints provided in the boot environment.
@@ -191,13 +224,23 @@ static int
 ar8327_init_pdata(struct arswitch_softc *sc)
 {
 	struct ar8327_pad_cfg pc;
+	struct ar8327_port_cfg port_cfg;
 	uint32_t t;
 
 	/* XXX hard-coded DB120 defaults for now! */
 
 	/* Port 0 - rgmii; 1000/full */
+	bzero(&port_cfg, sizeof(port_cfg));
+	port_cfg.speed = AR8327_PORT_SPEED_1000;
+	port_cfg.duplex = 1;
+	port_cfg.rxpause = 1;
+	port_cfg.txpause = 1;
+	port_cfg.force_link = 1;
+	sc->ar8327.port0_status = ar8327_get_port_init_status(&port_cfg);
 
 	/* Port 6 - ignore */
+	bzero(&port_cfg, sizeof(port_cfg));
+	sc->ar8327.port6_status = ar8327_get_port_init_status(&port_cfg);
 
 	/* Pad 0 */
 	bzero(&pc, sizeof(pc));
@@ -224,45 +267,12 @@ ar8327_init_pdata(struct arswitch_softc 
 	t = ar8327_get_pad_cfg(&pc);
 	arswitch_writereg(sc->sc_dev, AR8327_REG_PAD6_MODE, t);
 
-	/* LED config */
+	/* XXX LED config */
 
-	/* SGMII config */
-	return (0);
-}
+	/* XXX SGMII config */
 
-#if 0
-/*
- * Map the hard-coded port config from the switch setup to
- * the chipset port config (status, duplex, flow, etc.)
- */
-static uint32_t
-ar8327_get_port_init_status(struct ar8327_port_cfg *cfg)
-{
-	uint32_t t;
-
-	if (!cfg->force_link)
-		return (AR8X16_PORT_STS_LINK_AUTO);
-
-	t = AR8X16_PORT_STS_TXMAC | AR8X16_PORT_STS_RXMAC;
-	t |= cfg->duplex ? AR8X16_PORT_STS_DUPLEX : 0;
-	t |= cfg->rxpause ? AR8X16_PORT_STS_RXFLOW : 0;
-	t |= cfg->txpause ? AR8X16_PORT_STS_TXFLOW : 0;
-
-	switch (cfg->speed) {
-	case AR8327_PORT_SPEED_10:
-		t |= AR8X16_PORT_STS_SPEED_10;
-		break;
-	case AR8327_PORT_SPEED_100:
-		t |= AR8X16_PORT_STS_SPEED_100;
-		break;
-	case AR8327_PORT_SPEED_1000:
-		t |= AR8X16_PORT_STS_SPEED_1000;
-		break;
-	}
-
-	return (t);
+	return (0);
 }
-#endif
 
 static int
 ar8327_hw_setup(struct arswitch_softc *sc)
@@ -331,15 +341,12 @@ ar8327_port_init(struct arswitch_softc *
 {
 	uint32_t t;
 
-	/* XXX TODO: need to initialise port0/port6 status in pdata */
-
-#if 0
-        if (port == AR8216_PORT_CPU)
-                t = sc->chip_data.ar8327.port0_status;
-        else if (port == 6)
-                t = sc->chip_data.ar8327.port6_status;
+	if (port == AR8X16_PORT_CPU)
+		t = sc->ar8327.port0_status;
+	else if (port == 6)
+		t = sc->ar8327.port6_status;
         else
-#endif
+#if 0
 	/* XXX DB120 - hard-code port0 to 1000/full */
 	if (port == 0) {
 		t = AR8X16_PORT_STS_SPEED_1000;
@@ -348,6 +355,7 @@ ar8327_port_init(struct arswitch_softc *
 		t |= AR8X16_PORT_STS_RXFLOW;
 		t |= AR8X16_PORT_STS_TXFLOW;
 	} else
+#endif
 		t = AR8X16_PORT_STS_LINK_AUTO;
 
 	arswitch_writereg(sc->sc_dev, AR8327_REG_PORT_STATUS(port), t);

Modified: head/sys/dev/etherswitch/arswitch/arswitchvar.h
==============================================================================
--- head/sys/dev/etherswitch/arswitch/arswitchvar.h	Mon Feb 24 04:48:46 2014	(r262432)
+++ head/sys/dev/etherswitch/arswitch/arswitchvar.h	Mon Feb 24 05:55:00 2014	(r262433)
@@ -96,6 +96,12 @@ struct arswitch_softc {
 		int (* arswitch_vlan_set_pvid) (struct arswitch_softc *, int,
 		    int);
 	} hal;
+
+	struct {
+		uint32_t port0_status;
+		uint32_t port5_status;
+		uint32_t port6_status;
+	} ar8327;
 };
 
 #define	ARSWITCH_LOCK(_sc)			\

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