Date: Tue, 08 May 2007 02:31:23 +0100 From: "Bruce M. Simpson" <bms@incunabulum.net> To: freebsd-mips@FreeBSD.org Subject: Re: Broadcom MIPS progress Message-ID: <463FD2EB.7040504@incunabulum.net> In-Reply-To: <463F4F7D.6070001@incunabulum.net> References: <463F4F7D.6070001@incunabulum.net>
next in thread | previous in thread | raw e-mail | index | archive | help
Issues with CFE console and memory detection have now been ironed out. The mips2 branch prefers the use of CFE firmware routines to performing board-level resets in undocumented ways. "call cpu_reset" works; the low-level system console uses CFE. Bruce M. Simpson wrote: > > I will most likely try porting the SiliconBackplane bus enumeration > that's in bleeding-edge brcm support for Linux 2.6, which is much > cleaner than the Broadcom code floating around, not to mention closer > to NEWBUS in architecture. This may happen later in the week. I had problems teaching mips nexus to allocate global memory map space for hard-wired children (siba0). Tommorrow I'll focus on getting the enumeration working so that the cores on the Sentry5 siba backplane may be detected and configured. The most important cores are the Chipcommon core, the PCI host bridge, and the bcm44xx ethernet controller core. I believe the IPSEC core in Sentry5 is ubsec(4) compatible. However these devices default to presenting their register space on Siba, not PCI. There is a flash controller on Siba. For now, I am focusing on bringup; FreeBSD currently boots on these systems via TFTP ELF load. A tweak is needed for the linker script, to work around limitations in the CFE ELF loader, which I'd like to conditionalize on the presence of 'options CFE' in the kernel config file - any ideas? Thanks to Warner for helping out on the NEWBUS issues. Regards, BMS
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?463FD2EB.7040504>