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Date:      Tue, 22 Jun 2010 11:27:27 +0300
From:      Kostik Belousov <kostikbel@gmail.com>
To:        Alexander Motin <mav@freebsd.org>
Cc:        svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org
Subject:   Re: svn commit: r209371 - in head/sys: amd64/amd64 amd64/include conf dev/acpica i386/i386 i386/include isa kern pc98/cbus sys x86/isa x86/x86
Message-ID:  <20100622082727.GS13238@deviant.kiev.zoral.com.ua>
In-Reply-To: <4C207078.1020607@FreeBSD.org>
References:  <201006202133.o5KLXTG1023067@svn.freebsd.org> <20100621195838.GJ13238@deviant.kiev.zoral.com.ua> <4C1FC6C1.5060800@FreeBSD.org> <4C1FC6E1.4080001@FreeBSD.org> <20100621203419.GK13238@deviant.kiev.zoral.com.ua> <4C1FCF93.9000703@FreeBSD.org> <20100621210629.GN13238@deviant.kiev.zoral.com.ua> <4C1FD5CC.6070909@FreeBSD.org> <20100621212719.GO13238@deviant.kiev.zoral.com.ua> <4C207078.1020607@FreeBSD.org>

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On Tue, Jun 22, 2010 at 11:12:40AM +0300, Alexander Motin wrote:
> Kostik Belousov wrote:
> > On Tue, Jun 22, 2010 at 12:12:44AM +0300, Alexander Motin wrote:
> >> Kostik Belousov wrote:
> >>> Witness patch worked for me, and I can boot multiuser in the qemu-hos=
ted
> >>> system with hint.hpet.0.clock=3D0. Does the same hint should work for
> >>> amd64 ?
> >> Yes.
> >>
> >>> The issue is no longer critical for me due to hint, below is the dmesg
> >>> you asked for. Thanks.
> >> It is not verbose.
> >=20
> > Fair enough.
> >=20
> > hpet0: <High Precision Event Timer> iomem 0xfed00000-0xfed003ff on acpi0
> > hpet0: vendor 0x8086, rev 0x1, 100000000Hz 64bit, 3 timers, legacy route
> > hpet0:  t0: irqs 0x00000004 (0), 64bit, periodic
> > hpet0:  t1: irqs 0x00000004 (0), 64bit, periodic
> > hpet0:  t2: irqs 0x00000004 (0), 64bit, periodic
> > Timecounter "HPET" frequency 100000000 Hz quality 900
>=20
> So there are three timers without FSB interrupts support. They can use
> only IRQ2 (not sure if this is a good practice) and can steal IRQ0 and
> IRQ8 from i8254 and RTC, when "legacy route" enabled. So the only way to
> use all three timers without level-triggered interrupts is to completely
> and silently brake i8254 and RTC timers. I prefer not to do it now.
>=20
> Please try such a patch, it should fix QEMU panic without using hints,
> while HPET timers there won't be used until they implement either FSB
> interrupts or shareable level-triggred IRQ above 15:
>=20
> --- acpi_hpet.c.prev    2010-06-21 23:23:45.000000000 +0300
> +++ acpi_hpet.c 2010-06-22 10:52:43.000000000 +0300
> @@ -526,6 +526,7 @@ hpet_attach(device_t dev)
>                                 t->irq =3D -2;
>                 } else
>  #endif
> +               if (sc->irq >=3D 0)
>                         t->caps |=3D (sc->irq << 9) | HPET_TCNF_INT_TYPE;
>                 bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(i), t->caps);
>                 /* Skip event timers without set up IRQ. */
>=20

This worked as well, thank you.

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