Date: Mon, 24 Feb 2014 15:50:41 -0600 From: Stacey Son <sson@FreeBSD.org> To: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: [RFC] TLB-based reference bit emulation (patches) Message-ID: <AB889344-ABEF-4D4F-86FD-A3D0EAA6E095@FreeBSD.org>
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Hi all: Below are some links to patches that adds TLB-based reference bit = emulation for MIPS hardware with 64-bit physical addressing. This is = similar to what is described in the paper "Page Replacement and = Reference Bit Emulation in Mach" by Richard P. Draves. However, unlike = the Mach implementation the reference bit (or actually a *not* = referenced bit) is in the page table entry (PTE) and not in separate = array somewhere else in memory. The reference bit is set (or actually = cleared) in the TLB miss handler. With a PTE reference bit it is now = possible to have a complete implementation of pmap_ts_referenced() and = to correctly determine if the address is "MINCORE_REFERENCED" in = pmap_mincore(). The first patch actually adds free lists (and pmap_free_zero_pages() and = pmap_add_delayed_free_list()). The second patch adds the (not) = reference bit changes for exception.S and pmap.c. Currently this change = only applies to MIPS with 64 bit physical addresses because there is no = room for another PTE bit with MIPS32. Does anyone have any ideas for = the MIPS32 case other than the way it was done in Mach? http://people.freebsd.org/~sson/mips/superpages/pmap_freelist_1.diff = http://people.freebsd.org/~sson/mips/superpages/pmap_reference_bit_2.diff Next up is pmap_copy() and superpages. Best Regards, -stacey.=
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