Date: Tue, 26 Jan 2021 23:21:06 GMT From: Jessica Clarke <jrtc27@FreeBSD.org> To: doc-committers@FreeBSD.org, dev-commits-doc-all@FreeBSD.org Subject: git: 95f17be14b - main - Fix issues in past and present CheriBSD quarterly reports Message-ID: <202101262321.10QNL6q2054527@gitrepo.freebsd.org>
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The branch main has been updated by jrtc27 (src committer): URL: https://cgit.FreeBSD.org/doc/commit/?id=95f17be14bfc573b75985003dbbd440e99ca7eff commit 95f17be14bfc573b75985003dbbd440e99ca7eff Author: Jessica Clarke <jrtc27@FreeBSD.org> AuthorDate: 2021-01-21 03:14:12 +0000 Commit: Jessica Clarke <jrtc27@FreeBSD.org> CommitDate: 2021-01-26 23:20:52 +0000 Fix issues in past and present CheriBSD quarterly reports Reviewed by: debdrup Differential Revision: https://reviews.freebsd.org/D28264 --- website/content/en/status/report-2020-04-2020-06.html | 4 ++-- website/content/en/status/report-2020-07-2020-09.html | 8 ++++---- website/content/en/status/report-2020-10-2020-12.html | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/website/content/en/status/report-2020-04-2020-06.html b/website/content/en/status/report-2020-04-2020-06.html index 21d28d1871..66bfc60e7f 100644 --- a/website/content/en/status/report-2020-04-2020-06.html +++ b/website/content/en/status/report-2020-04-2020-06.html @@ -1750,8 +1750,8 @@ support for CHERI-MIPS. </p> <p>Much of this effort has been focused on preparing CheriBSD on CHERI-RISC-V for inclusion as a demonstrator system in DARPA's Finding -Exploits to Thwart Tampering (<a href="https://fett.darpa.mil)" shape="rect">FETT</a> Bug Bounty -program). +Exploits to Thwart Tampering (<a href="https://fett.darpa.mil" shape="rect">FETT</a>) Bug Bounty +program. </p> <p>In addition, work has begun this quarter on porting CheriBSD to Arm's Morello SoC. Morello is a prototype demonstrator board which adds CHERI diff --git a/website/content/en/status/report-2020-07-2020-09.html b/website/content/en/status/report-2020-07-2020-09.html index c8afb794f1..2c6b27698a 100644 --- a/website/content/en/status/report-2020-07-2020-09.html +++ b/website/content/en/status/report-2020-07-2020-09.html @@ -1681,14 +1681,14 @@ various new research features have been, or are currently being, merged: <h3>CHERI Documentation and Exercises</h3> <ul> -<li><p>We have released [Capability Hardware Enhanced RISC Instructions: CHERI - Instruction-Set Architecture (Version 8)](https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf). +<li><p>We have released <a href="https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf" shape="rect">Capability + Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8)</a>. Notable changes include promotion of CHERI-RISC-V to non-experimental and discussion of Arm's Morello prototype. </p> </li> -<li><p>We have developed a set of [Adversarial CHERI Exercises and - Missions](https://ctsrd-cheri.github.io/cheri-exercises) to introduce security +<li><p>We have developed a set of <a href="https://ctsrd-cheri.github.io/cheri-exercises" shape="rect">Adversarial + CHERI Exercises and Missions</a> to introduce security researchers to CHERI protections. </p></li></ul> <hr /><h2><a name="FreeBSD/RISC-V-Project" href="#FreeBSD/RISC-V-Project" id="FreeBSD/RISC-V-Project">FreeBSD/RISC-V Project</a></h2><table title="Links" style="white-space: nowrap;"><tr><td>Links</td></tr><tr><td><a href="https://wiki.freebsd.org/riscv" title="https://wiki.freebsd.org/riscv">Wiki</a></td><td>; diff --git a/website/content/en/status/report-2020-10-2020-12.html b/website/content/en/status/report-2020-10-2020-12.html index 9ebe7c42b4..e67590e93b 100644 --- a/website/content/en/status/report-2020-10-2020-12.html +++ b/website/content/en/status/report-2020-10-2020-12.html @@ -2118,11 +2118,11 @@ More details about <a href="https://github.com/BastilleBSD/bastille/releases" sh <p>upstream was updated to <code>0.8.202010101</code> (latest). ports (<code>sysutils/bastille</code>) was updated to <code>0.7.20200414</code>. -</p><hr /><h2><a name="CheriBSD" href="#CheriBSD" id="CheriBSD">CheriBSD</a></h2><table title="Links" style="white-space: nowrap;"><tr><td>Links</td></tr><tr><td><a href="http://www.cheri-cpu.org" title="http://www.cheri-cpu.org">CHERI Project homepage</a></td><td> - URL: <a href="http://www.cheri-cpu.org" title="CHERI Project homepage">http://www.cheri-cpu.org</a></td></tr><tr><td><a href="https://github.com/CTSRD-CHERI/cheribsd" title="https://github.com/CTSRD-CHERI/cheribsd">CHERi github repo</a></td><td> - URL: <a href="https://github.com/CTSRD-CHERI/cheribsd" title="CHERi github repo">https://github.com/CTSRD-CHERI/cheribsd</a></td></tr><tr><td><a href="https://www.morello-project.org" title="https://www.morello-project.org">Morello Platform landing page</a></td><td> +</p><hr /><h2><a name="CheriBSD" href="#CheriBSD" id="CheriBSD">CheriBSD</a></h2><table title="Links" style="white-space: nowrap;"><tr><td>Links</td></tr><tr><td><a href="http://www.cheri-cpu.org" title="http://www.cheri-cpu.org">CHERI Project Homepage</a></td><td> + URL: <a href="http://www.cheri-cpu.org" title="CHERI Project homepage">http://www.cheri-cpu.org</a></td></tr><tr><td><a href="https://github.com/CTSRD-CHERI/cheribsd" title="https://github.com/CTSRD-CHERI/cheribsd">CheriBSD GitHub Repo</a></td><td> + URL: <a href="https://github.com/CTSRD-CHERI/cheribsd" title="CHERi github repo">https://github.com/CTSRD-CHERI/cheribsd</a></td></tr><tr><td><a href="https://www.morello-project.org" title="https://www.morello-project.org">Morello Platform Landing Page</a></td><td> URL: <a href="https://www.morello-project.org" title="Morello Platform landing page">https://www.morello-project.org</a></td></tr><tr><td><a href="https://morello-dist.cl.cam.ac.uk" title="https://morello-dist.cl.cam.ac.uk">CheriBSD Morello Developer Preview</a></td><td> - URL: <a href="https://morello-dist.cl.cam.ac.uk" title="CheriBSD Morello Developer Preview">https://morello-dist.cl.cam.ac.uk</a></td></tr><tr><td><a href="https://developer.arm.com/architectures/cpu-architecture/a-profile/morello" title="https://developer.arm.com/architectures/cpu-architecture/a-profile/morello">ARM Morello Program</a></td><td> + URL: <a href="https://morello-dist.cl.cam.ac.uk" title="CheriBSD Morello Developer Preview">https://morello-dist.cl.cam.ac.uk</a></td></tr><tr><td><a href="https://developer.arm.com/architectures/cpu-architecture/a-profile/morello" title="https://developer.arm.com/architectures/cpu-architecture/a-profile/morello">Arm Morello Program</a></td><td> URL: <a href="https://developer.arm.com/architectures/cpu-architecture/a-profile/morello" title="ARM Morello Program">https://developer.arm.com/architectures/cpu-architecture/a-profile/morello</a></td></tr></table><p>; Contact: Alex Richardson <<a href="mailto:arichardson@FreeBSD.org">arichardson@FreeBSD.org</a>> <br />
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