Date: Fri, 26 Oct 2012 10:38:47 -0700 From: YongHyeon PYUN <pyunyh@gmail.com> To: Yamagi Burmeister <lists@yamagi.org> Cc: freebsd-fs@freebsd.org Subject: Re: Can not read from ZFS exported over NFSv4 but write to it Message-ID: <20121026173847.GA3140@michelle.cdnetworks.com> In-Reply-To: <20121025191745.7f6a7582d4401de467d3fe18@yamagi.org> References: <20121023204623.a1eef4f99b5f786050229b6c@yamagi.org> <1579346453.2736080.1351029315835.JavaMail.root@erie.cs.uoguelph.ca> <20121024213602.b727c557f0332f28a66f87cc@yamagi.org> <20121025180344.GC3267@michelle.cdnetworks.com> <20121025191745.7f6a7582d4401de467d3fe18@yamagi.org>
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On Thu, Oct 25, 2012 at 07:17:45PM +0200, Yamagi Burmeister wrote:
> Hello :)
>
> On Thu, 25 Oct 2012 11:03:44 -0700
> YongHyeon PYUN <pyunyh@gmail.com> wrote:
>
> > age(4) is cheap and consumer grade controller but it shows
> > good performance on various network loads. It's much better choice
> > than using other cheap controllers.
> >
> > Would you show me dmesg output(age(4) and atphy(4) only)?
> > And try disabling TSO or TX checksum offloading and see whether
> > that makes any difference.
> > I remember age(4) had a 64bit DMA bug but it was fixed long
> > time ago.
>
> Yeah I was the one who reported it. This is the same machine...
> If disabled TSO and it seems to work. I've copied ~10GB from
> the client to the server and the other way round without any
> problem.
>
> The dmesg (with verbose boot enabled) is:
>
> age0: <Attansic Technology Corp, L1 Gigabit Ethernet> mem
> 0xfeac0000-0xfeafffff irq 18 at device 0.0 on pci2 age0: PCI device
> revision : 0x00b0 age0: Chip id/revision : 0x9006
> age0: 1280 Tx FIFO, 2364 Rx FIFO
> age0: MSIX count : 0
> age0: MSI count : 1
> age0: attempting to allocate 1 MSI vectors (1 supported)
> msi: routing MSI IRQ 256 to local APIC 0 vector 48
> age0: using IRQ 256 for MSI
> age0: Using 1 MSI messages.
> age0: Read request size : 512 bytes.
> age0: TLP payload size : 128 bytes.
> age0: 4GB boundary crossed, switching to 32bit DMA addressing mode.
> age0: PCI VPD capability not found!
> miibus0: <MII bus> on age0
> atphy0: <Atheros F1 10/100/1000 PHY> PHY 0 on miibus0
> atphy0: OUI 0x00c82e, model 0x0001, rev. 5
> atphy0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX,
> 1000baseT-FDX, 1000baseT-FDX-master, auto age0: bpf attached
> age0: Ethernet address: 00:23:54:31:a0:12
> pci3: driver added
> age0: link state changed to DOWN
> age0: interrupt moderation is 100 us.
> age0: link state changed to UP
Thanks the info.
Would you try attached patch?
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Index: sys/dev/age/if_age.c
===================================================================
--- sys/dev/age/if_age.c (revision 242114)
+++ sys/dev/age/if_age.c (working copy)
@@ -1562,8 +1562,12 @@ age_encap(struct age_softc *sc, struct mbuf **m_he
*m_head = NULL;
return (ENOBUFS);
}
- ip = (struct ip *)(mtod(m, char *) + ip_off);
tcp = (struct tcphdr *)(mtod(m, char *) + poff);
+ m = m_pullup(m, poff + (tcp->th_off << 2));
+ if (m == NULL) {
+ *m_head = NULL;
+ return (ENOBUFS);
+ }
/*
* L1 requires IP/TCP header size and offset as
* well as TCP pseudo checksum which complicates
@@ -1578,14 +1582,11 @@ age_encap(struct age_softc *sc, struct mbuf **m_he
* Reset IP checksum and recompute TCP pseudo
* checksum as NDIS specification said.
*/
+ ip = (struct ip *)(mtod(m, char *) + ip_off);
+ tcp = (struct tcphdr *)(mtod(m, char *) + poff);
ip->ip_sum = 0;
- if (poff + (tcp->th_off << 2) == m->m_pkthdr.len)
- tcp->th_sum = in_pseudo(ip->ip_src.s_addr,
- ip->ip_dst.s_addr,
- htons((tcp->th_off << 2) + IPPROTO_TCP));
- else
- tcp->th_sum = in_pseudo(ip->ip_src.s_addr,
- ip->ip_dst.s_addr, htons(IPPROTO_TCP));
+ tcp->th_sum = in_pseudo(ip->ip_src.s_addr,
+ ip->ip_dst.s_addr, htons(IPPROTO_TCP));
}
*m_head = m;
}
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