Date: Mon, 10 Aug 2026 08:34:03 +0000 From: Kevin Bowling <kbowling@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 8eb4403e9d4a - main - iavf: Honor iflib transmit completion batching Message-ID: <6a798cfb.257b6.4eced87c@gitrepo.freebsd.org>
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The branch main has been updated by kbowling: URL: https://cgit.FreeBSD.org/src/commit/?id=8eb4403e9d4a35f33a0ce41067ccb1924c6960dd commit 8eb4403e9d4a35f33a0ce41067ccb1924c6960dd Author: Kevin Bowling <kbowling@FreeBSD.org> AuthorDate: 2026-08-10 07:31:56 +0000 Commit: Kevin Bowling <kbowling@FreeBSD.org> CommitDate: 2026-08-10 08:32:56 +0000 iavf: Honor iflib transmit completion batching iavf uses descriptor writeback by default. Hardware writes completion status into a transmit descriptor only when it completes a descriptor marked RS. iavf marked every packet RS even though its report-status queue recorded and inspected only descriptors selected by iflib. The other completion writes could not help reclaim descriptors. iflib marks selected packets with IPI_TX_INTR as completion checkpoints. It forces a checkpoint as deferred work or ring pressure grows. Retain EOP on every packet, but set RS only at those checkpoints. The deprecated head-writeback option on 700-series VFs gets the same batching: each RS checkpoint permits hardware to publish the completed ring head. DPDK uses the same sparse RS design. Let iflib choose the adaptive interval for FreeBSD. This is a PCIe/memory bandwidth savings. MFC after: 2 weeks --- sys/dev/iavf/iavf_txrx_iflib.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sys/dev/iavf/iavf_txrx_iflib.c b/sys/dev/iavf/iavf_txrx_iflib.c index 4707421748bc..991238b73e7a 100644 --- a/sys/dev/iavf/iavf_txrx_iflib.c +++ b/sys/dev/iavf/iavf_txrx_iflib.c @@ -304,8 +304,6 @@ iavf_tso_setup(struct tx_ring *txr, if_pkt_info_t pi) return ((idx + 1) & (scctx->isc_ntxd[0]-1)); } -#define IAVF_TXD_CMD (IAVF_TX_DESC_CMD_EOP | IAVF_TX_DESC_CMD_RS) - /** * iavf_isc_txd_encap - Encapsulate a Tx packet into descriptors * @arg: void pointer to the VSI structure @@ -327,7 +325,7 @@ iavf_isc_txd_encap(void *arg, if_pkt_info_t pi) bus_dma_segment_t *segs = pi->ipi_segs; struct iavf_tx_desc *txd = NULL; int i, j, mask, pidx_last; - u32 cmd, off, tx_intr; + u32 cmd, off, tx_intr, txd_cmd; if (__predict_false(pi->ipi_len < IAVF_MIN_FRAME)) { que->pkt_too_small++; @@ -338,6 +336,9 @@ iavf_isc_txd_encap(void *arg, if_pkt_info_t pi) i = pi->ipi_pidx; tx_intr = (pi->ipi_flags & IPI_TX_INTR); + txd_cmd = IAVF_TX_DESC_CMD_EOP; + if (tx_intr) + txd_cmd |= IAVF_TX_DESC_CMD_RS; /* Set up the TSO/CSUM offload */ if (pi->ipi_csum_flags & CSUM_OFFLOAD) { @@ -384,7 +385,7 @@ iavf_isc_txd_encap(void *arg, if_pkt_info_t pi) } /* Set the last descriptor for report */ txd->cmd_type_offset_bsz |= - htole64(((u64)IAVF_TXD_CMD << IAVF_TXD_QW1_CMD_SHIFT)); + htole64((u64)txd_cmd << IAVF_TXD_QW1_CMD_SHIFT); /* Add to report status array (if using TX interrupts) */ if (!vsi->enable_head_writeback && tx_intr) { txr->tx_rsq[txr->tx_rs_pidx] = pidx_last;home | help
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