Date: Fri, 23 Oct 2015 08:26:46 +0000 (UTC) From: Alexander Motin <mav@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289812 - head/sys/dev/isp Message-ID: <201510230826.t9N8QkTP088843@repo.freebsd.org>
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Author: mav Date: Fri Oct 23 08:26:45 2015 New Revision: 289812 URL: https://svnweb.freebsd.org/changeset/base/289812 Log: Some polishing and unification in ISR code. Modified: head/sys/dev/isp/isp.c head/sys/dev/isp/isp_freebsd.c head/sys/dev/isp/isp_pci.c head/sys/dev/isp/isp_sbus.c head/sys/dev/isp/ispreg.h head/sys/dev/isp/ispvar.h Modified: head/sys/dev/isp/isp.c ============================================================================== --- head/sys/dev/isp/isp.c Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/isp.c Fri Oct 23 08:26:45 2015 (r289812) @@ -5037,7 +5037,7 @@ isp_control(ispsoftc_t *isp, ispctl_t ct #endif void -isp_intr(ispsoftc_t *isp, uint32_t isr, uint16_t sema, uint16_t mbox) +isp_intr(ispsoftc_t *isp, uint16_t isr, uint16_t sema, uint16_t info) { XS_T *complist[MAX_REQUESTQ_COMPLETIONS], *xs; uint32_t iptr, optr, junk; @@ -5051,11 +5051,11 @@ again: */ if (sema) { fmbox: - if (mbox & MBOX_COMMAND_COMPLETE) { + if (info & MBOX_COMMAND_COMPLETE) { isp->isp_intmboxc++; if (isp->isp_mboxbsy) { int obits = isp->isp_obits; - isp->isp_mboxtmp[0] = mbox; + isp->isp_mboxtmp[0] = info; for (i = 1; i < ISP_NMBOX(isp); i++) { if ((obits & (1 << i)) == 0) { continue; @@ -5069,15 +5069,15 @@ again: } MBOX_NOTIFY_COMPLETE(isp); } else { - isp_prt(isp, ISP_LOGWARN, "mailbox cmd (0x%x) with no waiters", mbox); + isp_prt(isp, ISP_LOGWARN, "mailbox cmd (0x%x) with no waiters", info); } } else { - i = IS_FC(isp)? isp_parse_async_fc(isp, mbox) : isp_parse_async(isp, mbox); + i = IS_FC(isp)? isp_parse_async_fc(isp, info) : isp_parse_async(isp, info); if (i < 0) { return; } } - if ((IS_FC(isp) && mbox != ASYNC_RIOZIO_STALL) || isp->isp_state != ISP_RUNSTATE) { + if ((IS_FC(isp) && info != ASYNC_RIOZIO_STALL) || isp->isp_state != ISP_RUNSTATE) { goto out; } } @@ -5092,7 +5092,8 @@ again: if (isp->isp_mboxbsy && isp->isp_lastmbxcmd == MBOX_ABOUT_FIRMWARE) { goto fmbox; } - isp_prt(isp, ISP_LOGINFO, "interrupt (ISR=%x SEMA=%x) when not ready", isr, sema); + isp_prt(isp, ISP_LOGINFO, "interrupt (ISR=%x SEMA=%x INFO=%x) " + "when not ready", isr, sema, info); /* * Thank you very much! *Burrrp*! */ @@ -5110,8 +5111,8 @@ again: * Check for ATIO Queue entries. */ if (IS_24XX(isp) && - ((isr & BIU2400_R2HST_ISTAT_MASK) == ISP2400R2HST_ATIO_RSPQ_UPDATE || - (isr & BIU2400_R2HST_ISTAT_MASK) == ISP2400R2HST_ATIO_RQST_UPDATE)) { + (isr == ISPR2HST_ATIO_UPDATE || isr == ISPR2HST_ATIO_RSPQ_UPDATE || + isr == ISPR2HST_ATIO_UPDATE2)) { iptr = ISP_READ(isp, BIU2400_ATIO_RSPINP); optr = isp->isp_atioodx; @@ -5145,25 +5146,6 @@ again: #endif /* - * Get the current Response Queue Out Pointer. - * - * If we're a 2300 or 2400, we can ask what hardware what it thinks. - */ -#if 0 - if (IS_23XX(isp) || IS_24XX(isp)) { - optr = ISP_READ(isp, isp->isp_respoutrp); - /* - * Debug: to be taken out eventually - */ - if (isp->isp_resodx != optr) { - isp_prt(isp, ISP_LOGINFO, "isp_intr: hard optr=%x, soft optr %x", optr, isp->isp_resodx); - isp->isp_resodx = optr; - } - } else -#endif - optr = isp->isp_resodx; - - /* * You *must* read the Response Queue In Pointer * prior to clearing the RISC interrupt. * @@ -5184,6 +5166,7 @@ again: iptr = ISP_READ(isp, isp->isp_respinrp); } + optr = isp->isp_resodx; if (optr == iptr && sema == 0) { /* * There are a lot of these- reasons unknown- mostly on @@ -5207,8 +5190,8 @@ again: ; } else { sema = ISP_READ(isp, BIU_SEMA); - mbox = ISP_READ(isp, OUTMAILBOX0); - if ((sema & 0x3) && (mbox & 0x8000)) { + info = ISP_READ(isp, OUTMAILBOX0); + if ((sema & 0x3) && (info & 0x8000)) { goto again; } } Modified: head/sys/dev/isp/isp_freebsd.c ============================================================================== --- head/sys/dev/isp/isp_freebsd.c Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/isp_freebsd.c Fri Oct 23 08:26:45 2015 (r289812) @@ -4514,12 +4514,10 @@ static void isp_poll(struct cam_sim *sim) { ispsoftc_t *isp = cam_sim_softc(sim); - uint32_t isr; - uint16_t sema, mbox; + uint16_t isr, sema, info; - if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) { - isp_intr(isp, isr, sema, mbox); - } + if (ISP_READ_ISR(isp, &isr, &sema, &info)) + isp_intr(isp, isr, sema, info); } @@ -4538,11 +4536,9 @@ isp_watchdog(void *arg) * Hand crank the interrupt code just to be sure the command isn't stuck somewhere. */ if (handle != ISP_HANDLE_FREE) { - uint32_t isr; - uint16_t sema, mbox; - if (ISP_READ_ISR(isp, &isr, &sema, &mbox) != 0) { - isp_intr(isp, isr, sema, mbox); - } + uint16_t isr, sema, info; + if (ISP_READ_ISR(isp, &isr, &sema, &info) != 0) + isp_intr(isp, isr, sema, info); ohandle = handle; handle = isp_find_handle(isp, xs); } @@ -6269,13 +6265,12 @@ isp_mbox_wait_complete(ispsoftc_t *isp, } else { for (olim = 0; olim < max; olim++) { for (ilim = 0; ilim < usecs; ilim += 100) { - uint32_t isr; - uint16_t sema, mbox; + uint16_t isr, sema, info; if (isp->isp_osinfo.mboxcmd_done) { break; } - if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) { - isp_intr(isp, isr, sema, mbox); + if (ISP_READ_ISR(isp, &isr, &sema, &info)) { + isp_intr(isp, isr, sema, info); if (isp->isp_osinfo.mboxcmd_done) { break; } @@ -6343,16 +6338,14 @@ void isp_platform_intr(void *arg) { ispsoftc_t *isp = arg; - uint32_t isr; - uint16_t sema, mbox; + uint16_t isr, sema, info; ISP_LOCK(isp); isp->isp_intcnt++; - if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) { + if (ISP_READ_ISR(isp, &isr, &sema, &info)) + isp_intr(isp, isr, sema, info); + else isp->isp_intbogus++; - } else { - isp_intr(isp, isr, sema, mbox); - } ISP_UNLOCK(isp); } Modified: head/sys/dev/isp/isp_pci.c ============================================================================== --- head/sys/dev/isp/isp_pci.c Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/isp_pci.c Fri Oct 23 08:26:45 2015 (r289812) @@ -59,9 +59,9 @@ static uint32_t isp_pci_rd_reg_1080(isps static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t); static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int); static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t); -static int isp_pci_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *); -static int isp_pci_rd_isr_2300(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *); -static int isp_pci_rd_isr_2400(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *); +static int isp_pci_rd_isr(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); +static int isp_pci_rd_isr_2300(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); +static int isp_pci_rd_isr_2400(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); static int isp_pci_mbxdma(ispsoftc_t *); static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *); @@ -1112,7 +1112,7 @@ isp_pci_rd_debounced(ispsoftc_t *isp, in } static int -isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp) +isp_pci_rd_isr(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) { uint16_t isr, sema; @@ -1136,21 +1136,20 @@ isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp = isr; if ((*semap = sema) != 0) { if (IS_2100(isp)) { - if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) { + if (isp_pci_rd_debounced(isp, OUTMAILBOX0, info)) { return (0); } } else { - *mbp = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0)); + *info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0)); } } return (1); } static int -isp_pci_rd_isr_2300(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p) +isp_pci_rd_isr_2300(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) { - uint32_t hccr; - uint32_t r2hisr; + uint32_t hccr, r2hisr; if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) { *isrp = 0; @@ -1162,36 +1161,29 @@ isp_pci_rd_isr_2300(ispsoftc_t *isp, uin *isrp = 0; return (0); } - switch (r2hisr & BIU_R2HST_ISTAT_MASK) { + switch ((*isrp = r2hisr & BIU_R2HST_ISTAT_MASK)) { case ISPR2HST_ROM_MBX_OK: case ISPR2HST_ROM_MBX_FAIL: case ISPR2HST_MBX_OK: case ISPR2HST_MBX_FAIL: case ISPR2HST_ASYNC_EVENT: - *isrp = r2hisr & 0xffff; - *mbox0p = (r2hisr >> 16); *semap = 1; - return (1); + break; case ISPR2HST_RIO_16: - *isrp = r2hisr & 0xffff; - *mbox0p = ASYNC_RIO16_1; + *info = ASYNC_RIO16_1; *semap = 1; return (1); case ISPR2HST_FPOST: - *isrp = r2hisr & 0xffff; - *mbox0p = ASYNC_CMD_CMPLT; + *info = ASYNC_CMD_CMPLT; *semap = 1; return (1); case ISPR2HST_FPOST_CTIO: - *isrp = r2hisr & 0xffff; - *mbox0p = ASYNC_CTIO_DONE; + *info = ASYNC_CTIO_DONE; *semap = 1; return (1); case ISPR2HST_RSPQ_UPDATE: - *isrp = r2hisr & 0xffff; - *mbox0p = 0; *semap = 0; - return (1); + break; default: hccr = ISP_READ(isp, HCCR); if (hccr & HCCR_PAUSE) { @@ -1203,41 +1195,43 @@ isp_pci_rd_isr_2300(ispsoftc_t *isp, uin } return (0); } + *info = (r2hisr >> 16); + return (1); } static int -isp_pci_rd_isr_2400(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p) +isp_pci_rd_isr_2400(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) { uint32_t r2hisr; r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO)); isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr); - if ((r2hisr & BIU2400_R2HST_INTR) == 0) { + if ((r2hisr & BIU_R2HST_INTR) == 0) { *isrp = 0; return (0); } - switch (r2hisr & BIU2400_R2HST_ISTAT_MASK) { - case ISP2400R2HST_ROM_MBX_OK: - case ISP2400R2HST_ROM_MBX_FAIL: - case ISP2400R2HST_MBX_OK: - case ISP2400R2HST_MBX_FAIL: - case ISP2400R2HST_ASYNC_EVENT: - *isrp = r2hisr & 0xffff; - *mbox0p = (r2hisr >> 16); + switch ((*isrp = r2hisr & BIU_R2HST_ISTAT_MASK)) { + case ISPR2HST_ROM_MBX_OK: + case ISPR2HST_ROM_MBX_FAIL: + case ISPR2HST_MBX_OK: + case ISPR2HST_MBX_FAIL: + case ISPR2HST_ASYNC_EVENT: *semap = 1; - return (1); - case ISP2400R2HST_RSPQ_UPDATE: - case ISP2400R2HST_ATIO_RSPQ_UPDATE: - case ISP2400R2HST_ATIO_RQST_UPDATE: - *isrp = r2hisr & 0xffff; - *mbox0p = 0; + break; + case ISPR2HST_RSPQ_UPDATE: + case ISPR2HST_RSPQ_UPDATE2: + case ISPR2HST_ATIO_UPDATE: + case ISPR2HST_ATIO_RSPQ_UPDATE: + case ISPR2HST_ATIO_UPDATE2: *semap = 0; - return (1); + break; default: ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT); isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr); return (0); } + *info = (r2hisr >> 16); + return (1); } static uint32_t Modified: head/sys/dev/isp/isp_sbus.c ============================================================================== --- head/sys/dev/isp/isp_sbus.c Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/isp_sbus.c Fri Oct 23 08:26:45 2015 (r289812) @@ -388,7 +388,7 @@ isp_sbus_detach(device_t dev) bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off) static int -isp_sbus_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp) +isp_sbus_rd_isr(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) { uint16_t isr, sema; @@ -401,9 +401,8 @@ isp_sbus_rd_isr(ispsoftc_t *isp, uint32_ return (0); } *isrp = isr; - if ((*semap = sema) != 0) { - *mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0)); - } + if ((*semap = sema) != 0) + *info = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0)); return (1); } Modified: head/sys/dev/isp/ispreg.h ============================================================================== --- head/sys/dev/isp/ispreg.h Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/ispreg.h Fri Oct 23 08:26:45 2015 (r289812) @@ -125,17 +125,20 @@ #define BIU_R2HST_INTR (1 << 15) /* RISC to Host Interrupt */ #define BIU_R2HST_PAUSED (1 << 8) /* RISC paused */ -#define BIU_R2HST_ISTAT_MASK 0x3f /* intr information && status */ +#define BIU_R2HST_ISTAT_MASK 0xff /* intr information && status */ #define ISPR2HST_ROM_MBX_OK 0x1 /* ROM mailbox cmd done ok */ #define ISPR2HST_ROM_MBX_FAIL 0x2 /* ROM mailbox cmd done fail */ #define ISPR2HST_MBX_OK 0x10 /* mailbox cmd done ok */ #define ISPR2HST_MBX_FAIL 0x11 /* mailbox cmd done fail */ #define ISPR2HST_ASYNC_EVENT 0x12 /* Async Event */ #define ISPR2HST_RSPQ_UPDATE 0x13 /* Response Queue Update */ -#define ISPR2HST_RQST_UPDATE 0x14 /* Resquest Queue Update */ +#define ISPR2HST_RSPQ_UPDATE2 0x14 /* Response Queue Update */ #define ISPR2HST_RIO_16 0x15 /* RIO 1-16 */ #define ISPR2HST_FPOST 0x16 /* Low 16 bits fast post */ #define ISPR2HST_FPOST_CTIO 0x17 /* Low 16 bits fast post ctio */ +#define ISPR2HST_ATIO_UPDATE 0x1C /* ATIO Queue Update */ +#define ISPR2HST_ATIO_RSPQ_UPDATE 0x1D /* ATIO & Request Update */ +#define ISPR2HST_ATIO_UPDATE2 0x1E /* ATIO Queue Update */ /* fifo command stuff- mostly for SPI */ #define DFIFO_COMMAND (BIU_BLOCK+0x60) /* RW : Command FIFO Port */ @@ -246,11 +249,6 @@ #define BIU2100_ISR_RXDMA_INT_PENDING 0x0002 /* Global interrupt pending */ #define BIU2100_ISR_TXDMA_INT_PENDING 0x0001 /* Global interrupt pending */ -#define INT_PENDING(isp, isr) \ - IS_FC(isp)? \ - (IS_24XX(isp)? (isr & BIU2400_ISR_RISC_INT) : (isr & BIU2100_ISR_RISC_INT)) :\ - (isr & BIU_ISR_RISC_INT) - #define INT_PENDING_MASK(isp) \ (IS_FC(isp)? (IS_24XX(isp)? BIU2400_ISR_RISC_INT : BIU2100_ISR_RISC_INT) : \ (BIU_ISR_RISC_INT)) @@ -398,19 +396,6 @@ /* BIU2400_ISR definitions */ #define BIU2400_ISR_RISC_INT 0x8 -#define BIU2400_R2HST_INTR BIU_R2HST_INTR -#define BIU2400_R2HST_PAUSED BIU_R2HST_PAUSED -#define BIU2400_R2HST_ISTAT_MASK 0x1f -/* interrupt status meanings */ -#define ISP2400R2HST_ROM_MBX_OK 0x1 /* ROM mailbox cmd done ok */ -#define ISP2400R2HST_ROM_MBX_FAIL 0x2 /* ROM mailbox cmd done fail */ -#define ISP2400R2HST_MBX_OK 0x10 /* mailbox cmd done ok */ -#define ISP2400R2HST_MBX_FAIL 0x11 /* mailbox cmd done fail */ -#define ISP2400R2HST_ASYNC_EVENT 0x12 /* Async Event */ -#define ISP2400R2HST_RSPQ_UPDATE 0x13 /* Response Queue Update */ -#define ISP2400R2HST_ATIO_RSPQ_UPDATE 0x1C /* ATIO Response Queue Update */ -#define ISP2400R2HST_ATIO_RQST_UPDATE 0x1D /* ATIO Request Queue Update */ - /* BIU2400_HCCR definitions */ #define HCCR_2400_CMD_NOP 0x00000000 Modified: head/sys/dev/isp/ispvar.h ============================================================================== --- head/sys/dev/isp/ispvar.h Fri Oct 23 08:26:26 2015 (r289811) +++ head/sys/dev/isp/ispvar.h Fri Oct 23 08:26:45 2015 (r289812) @@ -58,7 +58,7 @@ */ typedef struct ispsoftc ispsoftc_t; struct ispmdvec { - int (*dv_rd_isr) (ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *); + int (*dv_rd_isr) (ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); uint32_t (*dv_rd_reg) (ispsoftc_t *, int); void (*dv_wr_reg) (ispsoftc_t *, int, uint32_t); int (*dv_mbxdma) (ispsoftc_t *); @@ -86,8 +86,8 @@ struct ispmdvec { * Macros to access ISP registers through bus specific layers- * mostly wrappers to vector through the mdvec structure. */ -#define ISP_READ_ISR(isp, isrp, semap, mbox0p) \ - (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, mbox0p) +#define ISP_READ_ISR(isp, isrp, semap, info) \ + (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, info) #define ISP_READ(isp, reg) \ (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) @@ -829,7 +829,7 @@ int isp_reinit(ispsoftc_t *, int); * semaphore register and first mailbox register (if appropriate). This also * means that most spurious/bogus interrupts not for us can be filtered first. */ -void isp_intr(ispsoftc_t *, uint32_t, uint16_t, uint16_t); +void isp_intr(ispsoftc_t *, uint16_t, uint16_t, uint16_t); /*
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