Date: Thu, 26 Feb 2026 17:15:15 +0000 From: Joel Bodenmann <jbo@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: 95b22213b3e4 - main - devel/prjpeppercorn112: Add new port Message-ID: <69a07fa3.3d3da.4e2b60e5@gitrepo.freebsd.org>
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The branch main has been updated by jbo: URL: https://cgit.FreeBSD.org/ports/commit/?id=95b22213b3e4ed9597f2198ea6b7c3ac0e2aa92f commit 95b22213b3e4ed9597f2198ea6b7c3ac0e2aa92f Author: Joel Bodenmann <jbo@FreeBSD.org> AuthorDate: 2026-02-26 16:56:40 +0000 Commit: Joel Bodenmann <jbo@FreeBSD.org> CommitDate: 2026-02-26 16:56:40 +0000 devel/prjpeppercorn112: Add new port This port is used by devel/nextpnr* to produce configuration bitstreams for CologneChip GateMate FPGAs. Notes: - This port is versioned because of version compatibility requirements with devel/nextpnr* - The timings tarball is mirrored because upstream currently does not provide a versioned archive/URL --- devel/Makefile | 1 + devel/prjpeppercorn112/Makefile | 32 ++++++++++++++++++++++++++++++++ devel/prjpeppercorn112/distinfo | 5 +++++ devel/prjpeppercorn112/pkg-descr | 4 ++++ devel/prjpeppercorn112/pkg-plist | 15 +++++++++++++++ 5 files changed, 57 insertions(+) diff --git a/devel/Makefile b/devel/Makefile index 4047a296c81b..56647ff80497 100644 --- a/devel/Makefile +++ b/devel/Makefile @@ -4336,6 +4336,7 @@ SUBDIR += premake5 SUBDIR += priv_wrapper SUBDIR += prjpeppercorn111 + SUBDIR += prjpeppercorn112 SUBDIR += projectcenter SUBDIR += prometheus-cpp SUBDIR += protobuf diff --git a/devel/prjpeppercorn112/Makefile b/devel/prjpeppercorn112/Makefile new file mode 100644 index 000000000000..29ca63ff4d21 --- /dev/null +++ b/devel/prjpeppercorn112/Makefile @@ -0,0 +1,32 @@ +PORTNAME= prjpeppercorn +DISTVERSIONPREFIX= v +DISTVERSION= 1.12 +CATEGORIES= devel +MASTER_SITES+= https://mirror.insane.engineer/gatemate-timings/20260210/:timings +DISTFILES+= gatemate-timings-latest.tar.gz:timings +DIST_SUBDIR= ${PORTNAME}/${DISTVERSION} +PKGNAMESUFFIX= 112 + +MAINTAINER= jbo@FreeBSD.org +COMMENT= GateMate FPGAs bitstream documentation and tools +WWW= https://github.com/YosysHQ/prjpeppercorn + +LICENSE= ISCL +LICENSE_FILE= ${WRKSRC}/COPYING + +LIB_DEPENDS= libboost_program_options.so:devel/boost-libs + +USES= cmake compiler:c++17-lang + +USE_GITHUB= yes +GH_ACCOUNT= YosysHQ + +CMAKE_SOURCE_PATH= ${WRKSRC}/libgm + +# Install additional files required by devel/nextpnr for chip DB building +post-install: + ${MKDIR} ${STAGEDIR}${DATADIR} + (cd ${WRKSRC}/gatemate && ${COPYTREE_SHARE} . ${STAGEDIR}${DATADIR}/gatemate) + (cd ${WRKSRC}/delay && ${COPYTREE_SHARE} . ${STAGEDIR}${DATADIR}/delay) + +.include <bsd.port.mk> diff --git a/devel/prjpeppercorn112/distinfo b/devel/prjpeppercorn112/distinfo new file mode 100644 index 000000000000..3f28eea3e260 --- /dev/null +++ b/devel/prjpeppercorn112/distinfo @@ -0,0 +1,5 @@ +TIMESTAMP = 1772124729 +SHA256 (prjpeppercorn/1.12/gatemate-timings-latest.tar.gz) = 8f73ffe76e894eb4e6b72eb5d9bb1d7ee93cf3e80a0f2b5ce2706268a8374e71 +SIZE (prjpeppercorn/1.12/gatemate-timings-latest.tar.gz) = 4265790 +SHA256 (prjpeppercorn/1.12/YosysHQ-prjpeppercorn-v1.12_GH0.tar.gz) = 4affc82f41e6596f59f669f8a61619e1f32e5d067bf5d44db6526bf4d9ea943b +SIZE (prjpeppercorn/1.12/YosysHQ-prjpeppercorn-v1.12_GH0.tar.gz) = 5717852 diff --git a/devel/prjpeppercorn112/pkg-descr b/devel/prjpeppercorn112/pkg-descr new file mode 100644 index 000000000000..539a23f7d11e --- /dev/null +++ b/devel/prjpeppercorn112/pkg-descr @@ -0,0 +1,4 @@ +GateMate FPGAs Bitstream Documentation and Tools. + +This port is used by devel/nextpnr to generate configuration bitstreams for +CologneChip GateMate FPGAs. diff --git a/devel/prjpeppercorn112/pkg-plist b/devel/prjpeppercorn112/pkg-plist new file mode 100644 index 000000000000..8db152121667 --- /dev/null +++ b/devel/prjpeppercorn112/pkg-plist @@ -0,0 +1,15 @@ +bin/gmpack +bin/gmunpack +%%DATADIR%%/delay/cc_best_eco_dly.dly +%%DATADIR%%/delay/cc_best_lpr_dly.dly +%%DATADIR%%/delay/cc_best_spd_dly.dly +%%DATADIR%%/delay/cc_typ_eco_dly.dly +%%DATADIR%%/delay/cc_typ_lpr_dly.dly +%%DATADIR%%/delay/cc_typ_spd_dly.dly +%%DATADIR%%/delay/cc_worst_eco_dly.dly +%%DATADIR%%/delay/cc_worst_lpr_dly.dly +%%DATADIR%%/delay/cc_worst_spd_dly.dly +%%DATADIR%%/gatemate/__init__.py +%%DATADIR%%/gatemate/chip.py +%%DATADIR%%/gatemate/die.py +%%DATADIR%%/gatemate/timing.pyhome | help
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